公开(公告)号：US09696775B2

公开(公告)日：2017-07-04

申请号：US14635607

申请日：2015-03-02

Applicant: INTEL IP CORPORATION

Inventor： Tian Yan Pu ,  Chenbo Liu ,  Thuyen Le ,  Lars Melzer

IPC: G06F1/32 ,  G06F11/22 ,  G06F1/26

CPC classification number: G06F1/26 ,  G06F1/3206 ,  G06F11/2273

Abstract: Embodiments include apparatuses, methods, and systems for determining a power consumption of a circuit block in an integrated circuit. The integrated circuit may include first and second power supply networks. In some embodiments, the integrated circuit may include a plurality of instances of a circuit block under test. A first instance of the circuit block may be coupled to the first power supply network during a first test run, and a second instance of the circuit block may be coupled to the second power supply network during a second test run. In other embodiments, a single instance of a circuit block under test may be coupled with the first power supply network during a first test run and coupled with the second power supply network during a second test run. The power consumption of the circuit block may be determined based on the first and second test runs.