公开(公告)号：US20190138903A1

公开(公告)日：2019-05-09

申请号：US15806393

申请日：2017-11-08

Applicant: International Business Machines Corporation

Inventor： Pradip Bose ,  Alper Buyuktosunoglu ,  Schuyler Eldridge ,  Karthik V Swaminathan ,  Augusto Vega ,  Swagath Venkataramani

IPC: G06N3/08 ,  G06N3/063

Abstract: An N modular redundancy method, system, and computer program product include a computer-implemented N modular redundancy method for neural networks, the method including selectively replicating the neural network by employing one of checker neural networks and selective N modular redundancy (N-MR) applied only to critical computations.

公开(公告)号：US11599795B2

公开(公告)日：2023-03-07

申请号：US15806393

申请日：2017-11-08

Applicant: International Business Machines Corporation

Inventor： Pradip Bose ,  Alper Buyuktosunoglu ,  Schuyler Eldridge ,  Karthik V Swaminathan ,  Augusto Vega ,  Swagath Venkataramani

IPC: G06N3/08 ,  G06N3/063 ,  G06N3/082

Abstract: An N modular redundancy method, system, and computer program product include a computer-implemented N modular redundancy method for neural networks, the method including selectively replicating the neural network by employing one of checker neural networks and selective N modular redundancy (N-MR) applied only to critical computations.

公开(公告)号：US11720469B1

公开(公告)日：2023-08-08

申请号：US18054603

申请日：2022-11-11

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Karthik V Swaminathan ,  Ramon Bertran Monfort ,  Alper Buyuktosunoglu ,  Pradip Bose

IPC: G06F11/34 ,  G06F11/30

CPC classification number: G06F11/3414 ,  G06F11/3075 ,  G06F11/3466

Abstract: A computer-implemented method, a computer system and a computer program product customize generation and application of stress test conditions in a processor core. The method includes receiving a workload at the processor core, where the workload includes a plurality of instructions and the processor core comprises a plurality of macros. The method also includes obtaining macro performance data for each macro in the plurality of macros from the processor core. The method further includes determining a switching activity level for each macro in the plurality of macros when each instruction in the plurality of instructions is run based on the macro performance data. Lastly, the method includes generating a stressmark comprising the plurality of instructions in the workload, where the stressmark is associated with a macro in the plurality of macros when the switching activity level for the macro is above a minimum threshold.

公开(公告)号：US20230214705A1

公开(公告)日：2023-07-06

申请号：US17566624

申请日：2021-12-30

Applicant: International Business Machines Corporation ,  The Board of Trustees of the University of Illinois

Inventor： Pin-Yu Chen ,  Nandhini Chandramoorthy ,  Karthik V Swaminathan ,  Jinjun Xiong ,  Devansh Paresh Shah ,  Bo Li

IPC: G06N20/00 ,  G06N5/04

CPC classification number: G06N20/00 ,  G06N5/04

Abstract: An input transformation function that transforms input data for a second machine learning system is learned using a first machine learning system, the learning being based on minimizing a summation of a task loss and a post-activation density loss. The input data is transformed using the learned input transformation function to alter the post-activation density to reduce an amount of energy consumed for an inferencing task and the inferencing task is carried out on the transformed input data using the second machine learning system.