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1.发明申请SYSTEM FOR ELECTRICAL TESTING AND MANUFACTURING OF A 3-D CHIP STACK AND METHOD 有权一种三维芯片堆栈和方法的电气测试和制造系统公开(公告)号：US20140300382A1
公开(公告)日：2014-10-09
申请号：US14082528
申请日：2013-11-18
IPC分类号： G01R31/28
CPC分类号： G01R31/2886 , G01R31/2896 , H01L22/14 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L25/0652 , H01L25/0657 , H01L2224/13 , H05K3/325 , H05K3/341 , Y10T29/49004 , Y10T29/4913 , Y10T29/49149
摘要： A method for electrical testing of a 3-D integrated circuit chip stack is described. The 3-D integrated circuit chip stack comprises at least a first integrated circuit chip and a second integrated circuit chip. The first integrated circuit chip and the second integrated circuit chip are not soldered together for performing electrical testing.
摘要翻译： 描述了一种用于3-D集成电路芯片堆栈的电测试的方法。 3-D集成电路芯片堆叠至少包括第一集成电路芯片和第二集成电路芯片。 第一集成电路芯片和第二集成电路芯片不被焊接在一起用于进行电气测试。
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2.发明申请SYSTEM FOR ELECTRICAL TESTING AND MANUFACTURING OF A 3-D CHIP STACK AND METHOD 审中-公开一种三维芯片堆栈和方法的电气测试和制造系统公开(公告)号：US20160097807A1
公开(公告)日：2016-04-07
申请号：US14965163
申请日：2015-12-10
IPC分类号： G01R31/28
CPC分类号： G01R31/2886 , G01R31/2896 , H01L22/14 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L25/0652 , H01L25/0657 , H01L2224/13 , H05K3/325 , H05K3/341 , Y10T29/49004 , Y10T29/4913 , Y10T29/49149
摘要： A method for electrical testing of a 3-D integrated circuit chip stack is described. The 3-D integrated circuit chip stack comprises at least a first integrated circuit chip and a second integrated circuit chip. The first integrated circuit chip and the second integrated circuit chip are not soldered together for performing electrical testing.
摘要翻译： 描述了一种用于3-D集成电路芯片堆栈的电测试的方法。 3-D集成电路芯片堆叠至少包括第一集成电路芯片和第二集成电路芯片。 第一集成电路芯片和第二集成电路芯片不被焊接在一起用于进行电气测试。
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