公开(公告)号：US10360338B2

公开(公告)日：2019-07-23

申请号：US14996511

申请日：2016-01-15

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Susan E. Cellier ,  Lewis W. Dewey, III ,  Anthony D. Hagin ,  Adam P. Matheny ,  Ron D. Rose ,  David J. Widiger ,  Patrick M. Williams

IPC: G06F17/50

Abstract: A computer-implemented method for extracting a capacitance for a target wire of an integrated circuit includes receiving a design of the integrated circuit having a plurality of wiring layers and selecting a target wire to perform the capacitance extraction. The method further includes determining a first adjacent wiring layer and a second adjacent wiring layer and removing a first subset and a second subset of a plurality of non-adjacent wiring layers from the plurality of wiring layers. The method includes approximating a first plate to be used in the extraction based on the first subset of the plurality of non-adjacent wiring layers and approximating a second plate to be used in the extraction based on the second subset of the plurality of non-adjacent wiring layers and performing the extraction of the target wire based on the first and second adjacent wiring layers and the first and second plates.