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公开(公告)号:US20140210655A1
公开(公告)日:2014-07-31
申请号:US14231212
申请日:2014-03-31
Applicant: INTERSIL AMERICAS INC.
Inventor: Giri NK RANGAN , Roger LEVINSON , John M. CARUSO
IPC: H03M3/00
Abstract: A sigma-delta converter may include a filter coupled to a first summation circuit and a second summation circuit. A multi bit quantizer may be coupled to the second summation circuit. A single bit digital-to-analog converter (DAC) may be included that defines a feedback path between the multi-bit quantizer and the first summation circuit. A feed-forward coefficient circuit defining a feed forward path between the first summation circuit and the second summation circuit may be included.
Abstract translation: Σ-Δ转换器可以包括耦合到第一求和电路和第二求和电路的滤波器。 多位量化器可以耦合到第二求和电路。 可以包括定义多位量化器和第一求和电路之间的反馈路径的单位数模转换器(DAC)。 可以包括限定第一求和电路和第二求和电路之间的前馈路径的前馈系数电路。