-
公开(公告)号：US20220254746A1
公开(公告)日：2022-08-11
申请号：US17677161
申请日：2022-02-22
发明人： Paul M. Enquist
IPC分类号： H01L23/00 , H01L21/50 , H01L25/065 , H01L25/00
摘要： A method for forming a direct hybrid bond and a device resulting from a direct hybrid bond including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, capped by a conductive barrier, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads capped by a second conductive barrier, aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads capped by conductive barriers formed by contact bonding of the first non-metallic region to the second non-metallic region.
-
公开(公告)号：US20200043910A1
公开(公告)日：2020-02-06
申请号：US16599744
申请日：2019-10-11
摘要： Systems and methods for efficient transfer of elements are disclosed. A film which supports a plurality of diced integrated device dies can be provided. The plurality of diced integrated device dies can be disposed adjacent one another along a surface of the film. The film can be positioned adjacent the support structure such that the surface of the film faces a support surface of the support structure. The film can be selectively positioned laterally relative to the support structure such that a selected first die is aligned with a first location of the support structure. A force can be applied in a direction nonparallel to the surface of the film to cause the selected first die to be directly transferred from the film to the support structure.
-
公开(公告)号：US10262963B2
公开(公告)日：2019-04-16
申请号：US15947461
申请日：2018-04-06
发明人： Paul M. Enquist
IPC分类号： H01L23/00 , H01L25/065 , H01L25/00 , H01L21/50
摘要： A method for forming a direct hybrid bond and a device resulting from a direct hybrid bond including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, capped by a conductive barrier, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads capped by a second conductive barrier, aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads capped by conductive barriers formed by contact bonding of the first non-metallic region to the second non-metallic region.
-
公开(公告)号：US20180226375A1
公开(公告)日：2018-08-09
申请号：US15849383
申请日：2017-12-20
IPC分类号： H01L23/00
摘要： A bonded structure can include a first element having a first interface feature and a second element having a second interface feature. The first interface feature can be bonded to the second interface feature to define an interface structure. A conductive trace can be disposed in or on the second element. A bond pad can be provided at an upper surface of the first element and in electrical communication with the conductive trace. An integrated device can be coupled to or formed with the first element or the second element.
-
公开(公告)号：US11276676B2
公开(公告)日：2022-03-15
申请号：US16413429
申请日：2019-05-15
发明人： Paul M. Enquist , Belgacem Haba
IPC分类号： H01L25/00 , H01L25/18 , H01L27/146 , H01L21/822 , H01L23/31 , H01L21/768 , H01L23/48 , H01L23/00 , H01L25/07
摘要： Stacked devices and methods of fabrication are provided. Die-to-wafer (D2W) direct-bonding techniques join layers of dies of various physical sizes, form factors, and foundry nodes to a semiconductor wafer, to interposers, or to boards and panels, allowing mixing and matching of variegated dies in the fabrication of 3D stacked devices during wafer level packaging (WLP). Molding material fills in lateral spaces between dies to enable fan-out versions of 3D die stacks with fine pitch leads and capability of vertical through-vias throughout. Molding material is planarized to create direct-bonding surfaces between multiple layers of the variegated dies for high interconnect density and reduction of vertical height. Interposers with variegated dies on one or both sides can be created and bonded to wafers. Logic dies and image sensors from different fabrication nodes and different wafer sizes can be stacked during WLP, or logic dies and high bandwidth memory (HBM) of different geometries can be stacked during WLP.
-
公开(公告)号：US20210313225A1
公开(公告)日：2021-10-07
申请号：US17315166
申请日：2021-05-07
IPC分类号： H01L21/768 , H01L23/48 , H01L23/00 , H01L25/065 , H01L25/00 , H01L27/06
摘要： A method of three-dimensionally integrating elements such as singulated die or wafers and an integrated structure having connected elements such as singulated dies or wafers. Either or both of the die and wafer may have semiconductor devices formed therein. A first element having a first contact structure is bonded to a second element having a second contact structure. First and second contact structures can be exposed at bonding and electrically interconnected as a result of the bonding. A via may be etched and filled after bonding to expose and form an electrical interconnect to interconnected first and second contact structures and provide electrical access to this interconnect from a surface.
-
公开(公告)号：US11011418B2
公开(公告)日：2021-05-18
申请号：US16206927
申请日：2018-11-30
IPC分类号： H01L23/00 , H01L21/768 , H01L23/48 , H01L25/065 , H01L25/00 , H01L27/06
摘要： A method of three-dimensionally integrating elements such as singulated die or wafers and an integrated structure having connected elements such as singulated dies or wafers. Either or both of the die and wafer may have semiconductor devices formed therein. A first element having a first contact structure is bonded to a second element having a second contact structure. First and second contact structures can be exposed at bonding and electrically interconnected as a result of the bonding. A via may be etched and filled after bonding to expose and form an electrical interconnect to interconnected first and second contact structures and provide electrical access to this interconnect from a surface.
-
公开(公告)号：US10896902B2
公开(公告)日：2021-01-19
申请号：US16599744
申请日：2019-10-11
IPC分类号： H01L25/00 , H01L21/67 , H01L21/683 , H01L21/78 , H01L21/66 , H01L25/10 , H01L25/075
摘要： Systems and methods for efficient transfer of elements are disclosed. A film which supports a plurality of diced integrated device dies can be provided. The plurality of diced integrated device dies can be disposed adjacent one another along a surface of the film. The film can be positioned adjacent the support structure such that the surface of the film faces a support surface of the support structure. The film can be selectively positioned laterally relative to the support structure such that a selected first die is aligned with a first location of the support structure. A force can be applied in a direction nonparallel to the surface of the film to cause the selected first die to be directly transferred from the film to the support structure.
-
公开(公告)号：US10312217B2
公开(公告)日：2019-06-04
申请号：US15205346
申请日：2016-07-08
IPC分类号： H01L23/00 , H01L21/02 , H01L21/20 , H01L21/311 , H01L21/762 , H01L29/06 , H01L21/322 , H01L27/085 , H01L29/16 , H01L25/065 , H01L25/00
摘要： A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bonding of materials such as silicon, silicon nitride and SiO2. The surfaces to be bonded are polished to a high degree of smoothness and planarity. VSE may use reactive ion etching or wet etching to slightly etch the surfaces being bonded. The surface roughness and planarity are not degraded and may be enhanced by the VSE process. The etched surfaces may be rinsed in solutions such as ammonium hydroxide or ammonium fluoride to promote the formation of desired bonding species on the surfaces.
-
公开(公告)号：US10269708B2
公开(公告)日：2019-04-23
申请号：US15853085
申请日：2017-12-22
IPC分类号： H01L25/065 , H01L21/768 , H01L23/528 , H01L23/522 , H01L25/00 , H01L23/00
摘要： A bonded device structure including a first substrate having a first set of conductive contact structures, preferably connected to a device or circuit, and having a first non-metallic region adjacent to the contact structures on the first substrate, a second substrate having a second set of conductive contact structures, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the contact structures on the second substrate, and a contact-bonded interface between the first and second set of contact structures formed by contact bonding of the first non-metallic region to the second non-metallic region. The contact structures include elongated contact features, such as individual lines or lines connected in a grid, that are non-parallel on the two substrates, making contact at intersections. Alignment tolerances are thus improved while minimizing dishing and parasitic capacitance.
-
-
-
-
-
-
-
-
-
搜索结果
32 条记录 (耗时 0.03 秒)
