公开(公告)号：US09547325B2

公开(公告)日：2017-01-17

申请号：US14625227

申请日：2015-02-18

申请人： INVENSENSE, INC.

发明人： Dusan Vecera

IPC分类号： G05F1/10 ,  G05F3/16

CPC分类号： G05F3/16

摘要： A low power bandgap circuit device that generates temperature independent reference voltages and/or zero temperature coefficient currents is disclosed. The circuit comprises a first pair of transistors, an amplifier, a star connected resistive network, and a second pair of transistors, wherein zero temperature coefficient currents are generated through mirroring and reuse of current from the star connected resistive network.

摘要翻译： 公开了一种产生温度无关参考电压和/或零温度系数电流的低功率带隙电路装置。 该电路包括第一对晶体管，放大器，星形连接的电阻网络和第二对晶体管，其中通过从星形连接的电阻网络的电流的镜像和再利用产生零温度系数电流。

公开(公告)号：US20160239037A1

公开(公告)日：2016-08-18

申请号：US14625227

申请日：2015-02-18

申请人： INVENSENSE, INC.

发明人： Dusan Vecera

IPC分类号： G05F3/16

CPC分类号： G05F3/16

摘要： A low power bandgap circuit device that generates temperature independent reference voltages and/or zero temperature coefficient currents is disclosed. The circuit comprises a first pair of transistors, an amplifier, a star connected resistive network, and a second pair of transistors, wherein zero temperature coefficient currents are generated through mirroring and reuse of current from the star connected resistive network.

摘要翻译： 公开了一种产生温度无关参考电压和/或零温度系数电流的低功率带隙电路装置。 该电路包括第一对晶体管，放大器，星形连接的电阻网络和第二对晶体管，其中通过从星形连接的电阻网络的电流的镜像和再利用产生零温度系数电流。

公开(公告)号：US20220116196A1

公开(公告)日：2022-04-14

申请号：US17314850

申请日：2021-05-07

申请人： INVENSENSE, INC.

发明人： Miroslav Svajda ,  Dusan Vecera ,  Igor Mucha

IPC分类号： H04L7/00 ,  G06F3/16 ,  H04R19/04 ,  H04R29/00 ,  H04R3/00

摘要： Technologies are provided for adaptive control of bias settings in a digital microphone. In some embodiments, a device includes a first component that provides data indicative of a clock frequency of operation in a functional mode of a digital microphone. The clock frequency clocks one or more microphone components having switching activity. The device also can include a second component that determines, using the clock frequency, an amount of bias current to supply to at least a first microphone component of the one or more microphone components. The device can further include a memory device that retains control parameters that include at least one of a first subset of parameters defining a relationship between current and frequency and a second subset of parameters defining a quantization of the relationship. The quantization including multiple bias current levels for respective frequency intervals.

公开(公告)号：US11184019B1

公开(公告)日：2021-11-23

申请号：US17127595

申请日：2020-12-18

申请人： INVENSENSE, INC.

发明人： Dusan Vecera

IPC分类号： H03M3/00

摘要： An analog-to-digital converter (ADC) with split-gate laddered-inverter quantizer is presented herein. The ADC converts, via the split-gate laddered-inverter quantizer, an analog input voltage into a digital output value. The split-gate laddered-inverter quantizer separately couples, during respective phases of a clock signal via respective capacitances, a reference voltage and an input voltage corresponding to the analog input voltage to P-type metal-oxide-semiconductor (PMOS) gates of a PMOS branch of the split-gate laddered-inverter quantizer and N-type metal-oxide-semiconductor (NMOS) gates of an NMOS branch of the split-gate laddered-inverter quantizer to optimize current flow at respective frequencies. Further, the split-gate laddered-inverter quantizer separately biases, during the respective phases of the clock signal, the NMOS gates and the PMOS gates at respective bias voltages to optimize the current flow at the respective frequencies.