利索-全球专利检索

  1. Login
  2. Sign Up

Search Results

16 records (took 0.028 seconds)

    Method and apparatus for processing streaming data using programmable logic
    2.
    发明授权
    Method and apparatus for processing streaming data using programmable logic 有权
    使用可编程逻辑处理流数据的方法和装置

    公开(公告)号：US09020928B2

    公开(公告)日：2015-04-28

    申请号：US14039128

    申请日：2013-09-27

    Applicant: IP Reservoir, LLC

    Inventor： Ronald S. Indeck ,  Ron Kaplan Cytron ,  Mark Allen Franklin

    IPC: G06F17/30

    CPC classification number: G06F17/30864 ,  G06F17/30017 ,  G06F17/30026 ,  G06F17/30047 ,  G06F17/30386 ,  G06F17/30492 ,  G06F17/30982 ,  G06F17/30985 ,  Y10S707/99931 ,  Y10S707/99933 ,  Y10S707/99936

    Abstract: Methods and apparatuses for processing streaming data using programmable logic are disclosed. With an exemplary embodiment, a programmable logic device can be used to sort streaming data and provide a processor with access to the sorted data. With another exemplary embodiment, an Internet search engine can include a programmable logic device to perform match operations in response to search queries for web pages. With another exemplary embodiment, a programmable logic device is configured to perform match operations on streaming data while a processor is freed to perform other tasks.

    Abstract translation: 公开了使用可编程逻辑处理流数据的方法和装置。 利用示例性实施例，可编程逻辑设备可以用于对流数据进行分类，并为处理器提供对排序数据的访问。 利用另一示例性实施例，因特网搜索引擎可以包括可编程逻辑设备，以响应于网页的搜索查询执行匹配操作。 利用另一示例性实施例，可编程逻辑设备被配置为在处理器被释放以执行其他任务时对流数据执行匹配操作。

    Method and Apparatus for Processing Streaming Data Using Programmable Logic
    3.
    发明申请
    Method and Apparatus for Processing Streaming Data Using Programmable Logic 有权
    使用可编程逻辑处理流数据的方法和装置

    公开(公告)号：US20140025656A1

    公开(公告)日：2014-01-23

    申请号：US14039128

    申请日：2013-09-27

    Applicant: IP Reservoir, LLC

    Inventor： Ronald S. Indeck ,  Ron Kaplan Cytron ,  Mark Allen Franklin

    IPC: G06F17/30

    CPC classification number: G06F17/30864 ,  G06F17/30017 ,  G06F17/30026 ,  G06F17/30047 ,  G06F17/30386 ,  G06F17/30492 ,  G06F17/30982 ,  G06F17/30985 ,  Y10S707/99931 ,  Y10S707/99933 ,  Y10S707/99936

    Abstract: Methods and apparatuses for processing streaming data using programmable logic are disclosed. With an exemplary embodiment, a programmable logic device can be used to sort streaming data and provide a processor with access to the sorted data. With another exemplary embodiment, an Internet search engine can include a programmable logic device to perform match operations in response to search queries for web pages. With another exemplary embodiment, a programmable logic device is configured to perform match operations on streaming data while a processor is freed to perform other tasks.

    Abstract translation: 公开了使用可编程逻辑处理流数据的方法和装置。 利用示例性实施例，可编程逻辑设备可以用于对流数据进行分类，并为处理器提供对排序数据的访问。 利用另一示例性实施例，因特网搜索引擎可以包括可编程逻辑设备，以响应于网页的搜索查询执行匹配操作。 利用另一示例性实施例，可编程逻辑设备被配置为在处理器被释放以执行其他任务时对流数据执行匹配操作。

    Intelligent Data Storage and Processing Using FPGA Devices
    4.
    发明申请
    Intelligent Data Storage and Processing Using FPGA Devices 有权

    公开(公告)号：US20210200559A1

    公开(公告)日：2021-07-01

    申请号：US17180432

    申请日：2021-02-19

    Applicant: IP Reservoir, LLC

    Inventor： Roger D. Chamberlain ,  Mark Allen Franklin ,  Ronald S. Indeck ,  Ron K. Cytron ,  Sharath R. Cholleti

    IPC: G06F9/445 ,  G06F16/2455 ,  G06F3/06 ,  G06F21/60 ,  G06F21/72 ,  G06F21/76 ,  G06F21/85 ,  G06Q40/06 ,  G06F17/00 ,  G06F9/48

    Abstract: A system is disclosed that comprises a field programmable gate array (FPGA), a network interface, and hardware description code, wherein the hardware description code is compilable into a plurality of bit configuration files for loading onto the FPGA, wherein each bit configuration file defines a pipelined processing operation for a hardware template. The FPGA comprises configurable hardware logic, and the FPGA can be accessible over a network via the network interface for commanding the FPGA to load a bit configuration file from among the bit configuration files onto the FPGA to thereby configure hardware logic on the FPGA to perform the pipelined processing operation defined by the loaded bit configuration file, and wherein the FPGA is configured to (1) receive streaming data and (2) process the streaming data through the configured hardware logic to perform the pipelined processing operation defined by the loaded bit configuration file on the streaming data.

    Intelligent Data Storage and Processing Using FPGA Devices
    8.
    发明申请
    Intelligent Data Storage and Processing Using FPGA Devices 有权
    使用FPGA器件实现智能数据存储和处理

    公开(公告)号：US20140310717A1

    公开(公告)日：2014-10-16

    申请号：US14315560

    申请日：2014-06-26

    Applicant: IP Reservoir, LLC

    Inventor： Roger D. Chamberlain ,  Mark Allen Franklin ,  Ronald S. Indeck ,  Ron K. Cytron ,  Sharath R. Cholleti

    IPC: G06F9/48

    CPC classification number: G06F9/44505 ,  G06F3/0601 ,  G06F3/061 ,  G06F3/0655 ,  G06F3/067 ,  G06F3/0683 ,  G06F9/4881 ,  G06F17/00 ,  G06F17/30477 ,  G06F21/602 ,  G06F21/72 ,  G06F21/76 ,  G06F21/85 ,  G06F2003/0692 ,  G06Q40/06

    Abstract: A re-configurable logic device such as a field programmable gate array (FPGA) can be used to deploy a data processing pipeline, the pipeline comprising a plurality of pipelined data processing engines, the plurality of pipelined data processing engines being configured to perform processing operations, wherein the pipeline comprises a multi-functional pipeline, and wherein the re-configurable logic device is further configured to controllably activate or deactivate each of the pipelined data processing engines in the pipeline in response to control instructions and thereby define a function for the pipeline, each pipeline function being the combined functionality of each activated pipelined data processing engine in the pipeline.

    Abstract translation: 诸如现场可编程门阵列（FPGA）的可重新配置的逻辑设备可以用于部署数据处理流水线，流水线包括多个流水线数据处理引擎，多个流水线数据处理引擎被配置为执行处理操作 其中所述流水线包括多功能流水线，并且其中所述可重新配置的逻辑设备还被配置为响应于控制指令在流水线中可控制地激活或去激活流水线数据处理引擎中的每一个，从而定义所述流水线的功能 ，每个流水线功能是在管线中的每个激活的流水线数据处理引擎的组合功能。

    Intelligent data storage and processing using FPGA devices
    9.
    发明授权
    Intelligent data storage and processing using FPGA devices 有权

    公开(公告)号：US10719334B2

    公开(公告)日：2020-07-21

    申请号：US16503244

    申请日：2019-07-03

    Applicant: IP Reservoir, LLC

    Inventor： Roger D. Chamberlain ,  Mark Allen Franklin ,  Ronald S. Indeck ,  Ron K. Cytron ,  Sharath R. Cholleti

    IPC: G06F16/00 ,  G06F9/445 ,  G06F16/2455 ,  G06F3/06 ,  G06F21/60 ,  G06F21/72 ,  G06F21/76 ,  G06F21/85 ,  G06Q40/06 ,  G06F17/00 ,  G06F9/48

    Abstract: Methods and systems are disclosed where an FPGA offloads a plurality of processing tasks from a processor. The FPGA can process streaming data received via a network interface, and the FPGA can be controllable in response to control instructions received from the processor. The FPGA comprises resident hardware logic for a plurality of data processing engines that are combinable as a processing pipeline within the FPGA. In response to the control instructions, the FPGA can control which of the data processing engines are activated and which of the data processing engines are deactivated to selectively tap into the streaming data to perform pipelined processing operations on the streaming data via the activated data processing engines. The deactivated data processing engines remain on the FPGA and provide a pass through path for the streaming data whereby the deactivated data processing engines do not perform processing operations on streaming data received thereby.

Patent Agency Ranking