Multiplier and neural network synapse using current mirror having
low-power mosfets
    1.
    发明授权
    Multiplier and neural network synapse using current mirror having low-power mosfets 失效
    使用具有低功率MOSFET的电流镜的乘法器和神经网络突触

    公开(公告)号:US5914868A

    公开(公告)日:1999-06-22

    申请号:US940004

    申请日:1997-09-29

    CPC分类号: G06G7/163 G06N3/0635

    摘要: A multiplier and a neural network synapse capable of removing nonlinear current using current mirror circuits. The multiplier produces a linear current by using MOS transistors operating in a nonsaturation region. The multiplier includes a first current mirror including a plurality of MOS transistors to form a first current and a second current mirror including a plurality of MOS transistors to form a second current, wherein the second current mirror is coupled in parallel to the first current mirror. As a result, the multiplier outputs an output current by subtracting a second current from said first current.

    摘要翻译: 乘法器和神经网络突触能够使用电流镜像电路去除非线性电流。 乘法器通过使用在非饱和区域中工作的MOS晶体管产生线性电流。 乘法器包括:包括多个MOS晶体管以形成第一电流的第一电流镜和包括多个MOS晶体管以形成第二电流的第二电流镜,其中第二电流镜并联耦合到第一电流镜。 结果,乘法器通过从所述第一电流减去第二电流来输出输出电流。

    High speed packet switching controller for telephone switching system
    2.
    发明授权
    High speed packet switching controller for telephone switching system 有权
    用于电话交换系统的高速分组交换控制器

    公开(公告)号:US06421341B1

    公开(公告)日:2002-07-16

    申请号:US09173018

    申请日:1998-10-15

    IPC分类号: H04L1250

    CPC分类号: H04L49/101 H04L2012/5686

    摘要: This invention relates to a high speed packet switching controller in a telephone switching system which can suitably be applied to a packet controller having large capacity using a neural network chip and maximize the system performance by the optimized switching operation. The high speed packet switching controller comprises a row address decoder for decoding a weight raw address which is inputted thereto, a column address decoder for decoding a weight column address which is inputted thereto, a matrix array for providing the neural network using address signals provided from the row address decoder and column address decoder and outputing varied voltage in accordance with an external weight value, a neural network for producing a final crossbar switching control signal, an external input/output bus for transmitting an output signal of the neural network, and an internal neural data bus for transmitting the address signal output from the row address decoder and column address decoder to the matrix array.

    摘要翻译: 本发明涉及电话交换系统中的高速分组交换控制器,其可以适用于使用神经网络芯片的具有大容量的分组控制器,并且通过优化的切换操作使系统性能最大化。 高速分组交换控制器包括:行地址解码器,用于对输入的加权原始地址进行解码;列地址解码器,用于对输入的加权列地址进行解码;矩阵阵列,用于使用从 行地址解码器和列地址解码器,并根据外部权重值输出变化的电压,用于产生最终交叉开关控制信号的神经网络,用于发送神经网络的输出信号的外部输入/输出总线,以及 用于将从行地址解码器和列地址解码器输出的地址信号发送到矩阵阵列的内部神经数据总线。

    Analogue multiplier using MOSFETs in nonsaturation region and current
mirror
    3.
    发明授权
    Analogue multiplier using MOSFETs in nonsaturation region and current mirror 失效
    模拟乘法器在非饱和区域和电流镜中使用MOSFET

    公开(公告)号:US5889665A

    公开(公告)日:1999-03-30

    申请号:US940007

    申请日:1997-09-29

    申请人: Il Song Han

    发明人: Il Song Han

    CPC分类号: G06G7/164

    摘要: A multiplier capable of removing nonlinear current using current mirror circuits. The multiplier uses MOSFET and BJT devices by the BiCOMS processes. The multiplier includes three current mirror circuits. A first current mirror includes a BJT Q.sub.3 and a BJT Q.sub.5 and also the BJT Q.sub.3 is coupled in series to the n-channel MOSFET M1 between the voltage V.sub.1 and a ground voltage level. A second current mirror includes a BJT Q.sub.7 and a BJT Q.sub.8. A third current mirror includes a BJT Q.sub.4 and a BJT Q.sub.6. Consequently, input voltage signals V.sub.1 and V.sub.dc applied to the n-channel MOSFETs M1 determine the current I.sub.1 and input voltage signals V.sub.1 and V.sub.2 applied to the n-channel MOSFET M2 determine the current I.sub.2.

    摘要翻译: 能够使用电流镜电路去除非线性电流的乘法器。 该乘法器通过BiCOMS工艺使用MOSFET和BJT器件。 该乘法器包括三个电流镜像电路。 第一电流镜包括BJT Q3和BJT Q5,并且BJT Q3与电压V1和接地电压电平之间的n沟道MOSFET M1串联耦合。 第二电流镜包括BJT Q7和BJT Q8。 第三电流镜包括BJT Q4和BJT Q6。 因此,施加到n沟道MOSFET M1的输入电压信号V1和Vdc确定电流I1,施加到n沟道MOSFET M2的输入电压信号V1和V2确定电流I2。

    Control-type continuous ramp converting apparatus and method therefore
    4.
    发明授权
    Control-type continuous ramp converting apparatus and method therefore 失效
    因此,控制式连续斜升变换装置和方法

    公开(公告)号:US5920212A

    公开(公告)日:1999-07-06

    申请号:US941105

    申请日:1997-09-30

    申请人: Il Song Han

    发明人: Il Song Han

    CPC分类号: G06N3/0635

    摘要: Control-type continuous ramp converting apparatus and method therefore. The present invention provides real-time processing of neurons in the neural network, easy implementation and reduction of manufacture cost of high density neurons in the neural network. The present invention comprises a first voltage controlling part for receiving a first voltage from an outside, and for non-linearly increasing a charged voltage in accordance with a differential continuous function of an exponential function; a second voltage controlling part for receiving a second voltage from an outside, and for non-linearly reducing a charged voltage in accordance with a differential continuous function of an exponential function; a charging part for charging an input current, and for providing the charged voltage of the charging part with the second voltage controlling part and an outside; and a plurality of switches for coupling outside and the first and the second voltage controlling part to the charging part, for selectively providing a third voltage from outside, an increased voltage and a decreased voltage based on the voltage of the charging part.

    摘要翻译: 因此,控制式连续斜升变换装置和方法。 本发明提供神经网络中神经元的实时处理,容易实现和降低神经网络中高密度神经元的制造成本。 本发明包括:第一电压控制部分,用于从外部接收第一电压,并且根据指数函数的差分连续函数非线性地增加充电电压; 第二电压控制部分,用于从外部接收第二电压,并且根据指数函数的差分连续函数非线性地减小充电电压; 用于对输入电流进行充电的充电部分,以及用于将充电部分的充电电压提供给第二电压控制部分和外部; 以及用于耦合到外部的多个开关和第一和第二电压控制部分到充电部分,用于基于充电部分的电压选择性地从外部提供第三电压,增加的电压和降低的电压。