公开(公告)号：US20110069464A1

公开(公告)日：2011-03-24

申请号：US12805381

申请日：2010-07-28

申请人： In Sung Joe ,  Yoon Dong Park ,  Kyoung Won Na ,  Sung Dong Suh ,  Kyoung Ho Ha ,  Seong Gu Kim ,  Dong Jae Shin ,  Ho-Chul Ji

发明人： In Sung Joe ,  Yoon Dong Park ,  Kyoung Won Na ,  Sung Dong Suh ,  Kyoung Ho Ha ,  Seong Gu Kim ,  Dong Jae Shin ,  Ho-Chul Ji

IPC分类号： H05K7/00 ,  H05K3/30

CPC分类号： G02B6/43 ,  G02B6/4214 ,  H05K1/0274

摘要： Provided is a memory module, a system using the memory module, and a method of fabricating the memory module. The memory module may include a printed circuit board and a memory package on the printed circuit board. The printed circuit board may include an embedded optical waveguide and a first optical window extending from the optical waveguide to a first surface of the printed circuit board. The memory package may also include a memory die having an optical input/output section and a second optical window. The optical input/output section, the second optical window, and the first optical window may be arranged in a line and the first optical window and the second optical window may be configured to at least one of transmit an optical signal from the optical waveguide to the optical input/output section and transmit an optical signal from the optical input/output section to the optical waveguide.

摘要翻译： 提供了一种存储器模块，使用该存储器模块的系统以及一种制造该存储器模块的方法。 存储器模块可以包括印刷电路板和印刷电路板上的存储器封装。 印刷电路板可以包括嵌入式光波导和从光波导延伸到印刷电路板的第一表面的第一光学窗口。 存储器封装还可以包括具有光学输入/输出部分和第二光学窗口的存储器管芯。 光学输入/输出部分，第二光学窗口和第一光学窗口可以被布置成一行，并且第一光学窗口和第二光学窗口可以被配置为将从光波导的光信号传输到 光输入/输出部分，并将光信号从光输入/输出部分传输到光波导。

公开(公告)号：US08593826B2

公开(公告)日：2013-11-26

申请号：US12805381

申请日：2010-07-28

申请人： In Sung Joe ,  Yoon Dong Park ,  Kyoung Won Na ,  Sung Dong Suh ,  Kyoung Ho Ha ,  Seong Gu Kim ,  Dong Jae Shin ,  Ho-Chul Ji

发明人： In Sung Joe ,  Yoon Dong Park ,  Kyoung Won Na ,  Sung Dong Suh ,  Kyoung Ho Ha ,  Seong Gu Kim ,  Dong Jae Shin ,  Ho-Chul Ji

IPC分类号： H05K7/00

CPC分类号： G02B6/43 ,  G02B6/4214 ,  H05K1/0274

摘要： Provided is a memory module, a system using the memory module, and a method of fabricating the memory module. The memory module may include a printed circuit board and a memory package on the printed circuit board. The printed circuit board may include an embedded optical waveguide and a first optical window extending from the optical waveguide to a first surface of the printed circuit board. The memory package may also include a memory die having an optical input/output section and a second optical window. The optical input/output section, the second optical window, and the first optical window may be arranged in a line and the first optical window and the second optical window may be configured to at least one of transmit an optical signal from the optical waveguide to the optical input/output section and transmit an optical signal from the optical input/output section to the optical waveguide.

摘要翻译： 提供了一种存储器模块，使用该存储器模块的系统以及一种制造该存储器模块的方法。 存储器模块可以包括印刷电路板和印刷电路板上的存储器封装。 印刷电路板可以包括嵌入式光波导和从光波导延伸到印刷电路板的第一表面的第一光学窗口。 存储器封装还可以包括具有光学输入/输出部分和第二光学窗口的存储器管芯。 光学输入/输出部分，第二光学窗口和第一光学窗口可以被布置成一行，并且第一光学窗口和第二光学窗口可以被配置为将从光波导的光信号传输到 光输入/输出部分，并将光信号从光输入/输出部分传输到光波导。

公开(公告)号：US20110206381A1

公开(公告)日：2011-08-25

申请号：US12911417

申请日：2010-10-25

申请人： Ho-Chul Ji ,  Kyoung Won Na ,  Sung Dong Suh ,  Kyoung Ho Ha ,  Seong Gu Kim ,  Dong Jae Shin ,  In Sung Joe

发明人： Ho-Chul Ji ,  Kyoung Won Na ,  Sung Dong Suh ,  Kyoung Ho Ha ,  Seong Gu Kim ,  Dong Jae Shin ,  In Sung Joe

IPC分类号： H04B10/00

CPC分类号： H04B10/801 ,  H04J14/08

摘要： An optical serializer/deserializer (SERDES) includes serializing circuitry which includes a source of a plurality of unmodulated optical signals, a modulation unit for generating a plurality of modulated optical signals using a plurality of electrical signals to modulate the plurality of unmodulated optical signals, and a coupling unit for delaying the plurality of modulated optical signs to generate a plurality of delayed modulated optical signals and combines the delayed modulated optical signals to generate a serialized modulated optical signal. Deserializing circuitry of the SERDES includes an optical splitter for splitting a serialized modulated optical signal into a plurality of modulated split optical signals, a demodulation unit for demodulating the modulated split optical signals and generating a respective plurality of demodulated split optical signals, and a delay unit for delaying each of the plurality of demodulated split optical signals by a respective delay amount such that the serialized modulated optical signal is converted into a respective plurality of parallel demodulated split optical signals.

摘要翻译： 光串行器/解串器（SERDES）包括串行化电路，其包括多个未调制的光信号的源，调制单元，用于使用多个电信号产生多个调制的光信号，以调制多个未调制的光信号;以及 耦合单元，用于延迟所述多个调制的光学符号以产生多个延迟调制的光信号，并组合所述经延迟的经调制的光信号以产生串行调制的光信号。 SERDES的反序列化电路包括用于将串行调制的光信号分解为多个调制的分离的光信号的光分路器，用于解调调制的分离的光信号并产生相应的多个解调的分离光信号的解调单元，以及延迟单元 用于将所述多个解调的分离光信号中的每一个延迟各自的延迟量，使得所述串行调制的光信号被转换成相应的多个并行解调的分离光信号。

公开(公告)号：US20130064496A1

公开(公告)日：2013-03-14

申请号：US13549845

申请日：2012-07-16

申请人： Sung Dong Suh ,  In Sung Joe ,  Seong Gu Kim ,  Kyoung Won Na ,  Kyoung Ho Ha ,  Yong Hwack Shin

发明人： Sung Dong Suh ,  In Sung Joe ,  Seong Gu Kim ,  Kyoung Won Na ,  Kyoung Ho Ha ,  Yong Hwack Shin

IPC分类号： G02B6/26 ,  G02B6/12

CPC分类号： H04B10/25 ,  G02B6/107 ,  G02B6/12004 ,  G02B6/12007 ,  G02B6/14 ,  G02B6/29344 ,  G02B6/2938 ,  Y10T29/49

摘要： An optical link may include a main optical waveguide; N sub-optical waveguides, where N is a natural number; N mode couplers, each configured to perform a mode coupling operation between the main optical waveguide and a respective one of the N sub-optical waveguide; and an optical wavelength filter connected to an output terminal of the main optical waveguide and an output terminal of each of the N sub-optical waveguides. A memory system may include a memory device, a memory controller, and the optical link. A data processing system may include the memory system and a central processing unit connected to the memory system through a bus.

摘要翻译： 光链路可以包括主光波导; N个子光波导，其中N是自然数; N模耦合器，其被配置为在所述主光波导与所述N个子光波导中的相应一个之间执行模式耦合操作; 以及连接到主光波导的输出端子和N个子光波导中的每一个的输出端子的光波长滤波器。 存储器系统可以包括存储器设备，存储器控制器和光学链路。 数据处理系统可以包括存储器系统和通过总线连接到存储器系统的中央处理单元。

公开(公告)号：US09176277B2

公开(公告)日：2015-11-03

申请号：US13549845

申请日：2012-07-16

申请人： Sung Dong Suh ,  In Sung Joe ,  Seong Gu Kim ,  Kyoung Won Na ,  Kyoung Ho Ha ,  Yong Hwack Shin

发明人： Sung Dong Suh ,  In Sung Joe ,  Seong Gu Kim ,  Kyoung Won Na ,  Kyoung Ho Ha ,  Yong Hwack Shin

IPC分类号： G02B6/12

CPC分类号： H04B10/25 ,  G02B6/107 ,  G02B6/12004 ,  G02B6/12007 ,  G02B6/14 ,  G02B6/29344 ,  G02B6/2938 ,  Y10T29/49

摘要： An optical link may include a main optical waveguide; N sub-optical waveguides, where N is a natural number; N mode couplers, each configured to perform a mode coupling operation between the main optical waveguide and a respective one of the N sub-optical waveguide; and an optical wavelength filter connected to an output terminal of the main optical waveguide and an output terminal of each of the N sub-optical waveguides. A memory system may include a memory device, a memory controller, and the optical link. A data processing system may include the memory system and a central processing unit connected to the memory system through a bus.

摘要翻译： 光链路可以包括主光波导; N个子光波导，其中N是自然数; N模耦合器，其被配置为在所述主光波导与所述N个子光波导中的相应一个之间执行模式耦合操作; 以及连接到主光波导的输出端子和N个子光波导中的每一个的输出端子的光波长滤波器。 存储器系统可以包括存储器设备，存储器控制器和光学链路。 数据处理系统可以包括存储器系统和通过总线连接到存储器系统的中央处理单元。

公开(公告)号：US09325414B2

公开(公告)日：2016-04-26

申请号：US14883239

申请日：2015-10-14

申请人： Sung Dong Suh ,  In Sung Joe ,  Seong Gu Kim ,  Kyoung Won Na ,  Kyoung Ho Ha ,  Yong Hwack Shin

发明人： Sung Dong Suh ,  In Sung Joe ,  Seong Gu Kim ,  Kyoung Won Na ,  Kyoung Ho Ha ,  Yong Hwack Shin

IPC分类号： G02B6/14 ,  G02B6/12 ,  H04B10/25 ,  G02B6/293 ,  G02B6/10

CPC分类号： H04B10/25 ,  G02B6/107 ,  G02B6/12004 ,  G02B6/12007 ,  G02B6/14 ,  G02B6/29344 ,  G02B6/2938 ,  Y10T29/49

摘要： A data processing system may include: a first device; a second device; and an optical link connected between the first and second devices. The optical link may include a main optical waveguide configured to transmit an optical signal output from the second device; N sub-optical waveguides; N mode couplers, each configured to perform a mode coupling operation between the main optical waveguide and a respective one of the N sub-optical waveguides; and an optical wavelength filter connected to an output terminal of the main optical waveguide and an output terminal of each one of the N sub-optical waveguides. Each of the N sub-optical waveguides may include a first region formed at a first distance from the main optical waveguide; a second region formed at a second, greater distance from the main optical waveguide; and a third region for connecting the first and second regions.

摘要翻译： 数据处理系统可以包括：第一设备; 第二设备; 以及连接在第一和第二设备之间的光学链路。 光链路可以包括：主光波导，被配置为传输从第二设备输出的光信号; N个子光波导; N模耦合器，其被配置为在主光波导和N个子光波导中的相应一个之间执行模式耦合操作; 以及连接到主光波导的输出端子和N个子光波导中的每一个的输出端子的光波长滤波器。 N个子光波导中的每一个可以包括形成在距离主光波导的第一距离处的第一区域; 形成在距离主光波导的第二更大距离处的第二区域; 以及用于连接第一和第二区域的第三区域。

公开(公告)号：US20160043802A1

公开(公告)日：2016-02-11

申请号：US14883239

申请日：2015-10-14

申请人： Sung Dong Suh ,  In Sung Joe ,  Seong Gu Kim ,  Kyoung Won Na ,  Kyoung Ho Ha ,  Yong Hwack Shin

发明人： Sung Dong Suh ,  In Sung Joe ,  Seong Gu Kim ,  Kyoung Won Na ,  Kyoung Ho Ha ,  Yong Hwack Shin

IPC分类号： H04B10/25 ,  G02B6/12 ,  G02B6/14 ,  G02B6/293 ,  G02B6/10

CPC分类号： H04B10/25 ,  G02B6/107 ,  G02B6/12004 ,  G02B6/12007 ,  G02B6/14 ,  G02B6/29344 ,  G02B6/2938 ,  Y10T29/49

摘要： A data processing system may include: a first device; a second device; and an optical link connected between the first and second devices. The optical link may include a main optical waveguide configured to transmit an optical signal output from the second device; N sub-optical waveguides; N mode couplers, each configured to perform a mode coupling operation between the main optical waveguide and a respective one of the N sub-optical waveguides; and an optical wavelength filter connected to an output terminal of the main optical waveguide and an output terminal of each one of the N sub-optical waveguides. Each of the N sub-optical waveguides may include a first region formed at a first distance from the main optical waveguide; a second region formed at a second, greater distance from the main optical waveguide; and a third region for connecting the first and second regions.

摘要翻译： 数据处理系统可以包括：第一设备; 第二设备; 以及连接在第一和第二设备之间的光学链路。 光链路可以包括：主光波导，被配置为传输从第二设备输出的光信号; N个子光波导; N模耦合器，其被配置为在主光波导和N个子光波导中的相应一个之间执行模式耦合操作; 以及连接到主光波导的输出端子和N个子光波导中的每一个的输出端子的光波长滤波器。 N个子光波导中的每一个可以包括形成在距离主光波导的第一距离处的第一区域; 形成在距离主光波导的第二更大距离处的第二区域; 以及用于连接第一和第二区域的第三区域。

公开(公告)号：US20090292973A1

公开(公告)日：2009-11-26

申请号：US12453814

申请日：2009-05-22

申请人： Kwang Soo Seol ,  Sung Il Park ,  Kyoung Lae Cho ,  In Sung Joe

发明人： Kwang Soo Seol ,  Sung Il Park ,  Kyoung Lae Cho ,  In Sung Joe

IPC分类号： H03M13/05 ,  G06F11/10

CPC分类号： H03M13/611 ,  G06F11/1072 ,  G11C7/1006 ,  G11C11/5642 ,  G11C16/26 ,  G11C29/00 ,  H03M13/13 ,  H03M13/15 ,  H03M13/27 ,  H03M13/2732 ,  H03M13/2906 ,  H03M13/3707 ,  H03M13/3715 ,  H03M13/47

摘要： Memory devices and/or methods of storing memory data bits may be provided. A memory device may include a multi-level cell (MLC) array including a plurality of MLCs, an error correction unit configured to encode data to be recorded in an MLC, where the encoded data is converted to convert the encoded data into a codeword, an error pattern analysis unit configured to analyze a first data pattern included in the codeword corresponding to an error pattern included in the codeword and a data conversion unit configured to convert the analyzed first data pattern into a second data pattern. According to the above memory devices and/or methods, it may be possible to efficiently reduce a data error that occurs when the data is stored for a relatively long period of time, thereby improving reliability.

摘要翻译： 可以提供存储器件和/或存储存储器数据位的方法。 存储器装置可以包括包括多个MLC的多级单元（MLC）阵列，错误校正单元，被配置为对要记录在MLC中的数据进行编码，其中编码数据被转换以将编码数据转换为码字， 错误模式分析单元，被配置为分析与码字中包含的错误模式相对应的码字中包含的第一数据模式;以及数据转换单元，被配置为将所分析的第一数据模式转换为第二数据模式。 根据上述存储器件和/或方法，可以有效地减少在数据存储较长时间段时发生的数据错误，从而提高可靠性。

公开(公告)号：US08301978B2

公开(公告)日：2012-10-30

申请号：US12453814

申请日：2009-05-22

申请人： Kwang Soo Seol ,  Sung II Park ,  Kyoung Lae Cho ,  In Sung Joe

发明人： Kwang Soo Seol ,  Sung II Park ,  Kyoung Lae Cho ,  In Sung Joe

IPC分类号： G11C29/00

CPC分类号： H03M13/611 ,  G06F11/1072 ,  G11C7/1006 ,  G11C11/5642 ,  G11C16/26 ,  G11C29/00 ,  H03M13/13 ,  H03M13/15 ,  H03M13/27 ,  H03M13/2732 ,  H03M13/2906 ,  H03M13/3707 ,  H03M13/3715 ,  H03M13/47

摘要： Memory devices and/or methods of storing memory data bits are provided. A memory device includes a multi-level cell (MLC) array including a plurality of MLCs, an error correction unit configured to encode data to be recorded in an MLC, where the encoded data is converted to convert the encoded data into a codeword, an error pattern analysis unit configured to analyze a first data pattern included in the codeword corresponding to an error pattern included in the codeword and a data conversion unit configured to convert the analyzed first data pattern into a second data pattern. According to the above memory devices and/or methods, it is possible to efficiently reduce a data error that occurs when the data is stored for a relatively long period of time, thereby improving reliability.

摘要翻译： 提供了存储器件和/或存储存储器数据位的方法。 存储器件包括包括多个MLC的多电平单元（MLC）阵列，纠错单元，被配置为编码要记录在MLC中的数据，其中编码数据被转换以将编码数据转换为码字， 错误模式分析单元，被配置为分析与包括在码字中的错误模式相对应的码字中包含的第一数据模式;以及数据转换单元，被配置为将分析的第一数据模式转换为第二数据模式。 根据上述存储器件和/或方法，可以有效地减少在数据存储较长时间段时发生的数据错误，从而提高可靠性。