公开(公告)号：US09887007B1

公开(公告)日：2018-02-06

申请号：US15381703

申请日：2016-12-16

Applicant: Industrial Technology Research Institute

Inventor： Chia-Chen Kuo ,  Shyh-Shyuan Sheu

IPC: G11C5/06 ,  G11C13/00

CPC classification number: G11C13/0069 ,  G11C13/003 ,  G11C13/0061 ,  G11C2013/0066 ,  G11C2013/0071 ,  G11C2213/79

Abstract: A variable-resistance memory and a writing method thereof are provided. The variable-resistance memory includes a variable-resistance memory cell, a voltage-signal-generation circuit, a switch circuit, a detection circuit, and a controller. The variable-resistance memory cell includes a variable-resistance component and a transistor. The voltage-signal-generation circuit is coupled to the control terminal of the transistor. The switch circuit is coupled to the variable-resistance component and transistor. The detection circuit is coupled to a voltage source and the switch circuit. The controller is coupled to the voltage-signal-generation circuit, switch circuit, and detection circuit. When the controller performs a writing operation on the variable-resistance memory cell, the voltage-signal-generation circuit provides a voltage signal to the transistor, and the detection circuit continuously detects whether the variable-resistance component performs a resistance conversion. If the resistance conversion occurs, then the controller stops the writing operation.

公开(公告)号：US20160118120A1

公开(公告)日：2016-04-28

申请号：US14749651

申请日：2015-06-25

Applicant: Industrial Technology Research Institute

Inventor： Pei-Ling Tseng ,  Chia-Chen Kuo ,  Shyh-Shyuan Sheu ,  Meng-Fan Chang

IPC: G11C13/00

CPC classification number: G11C13/0097 ,  G11C13/0023 ,  G11C13/0026 ,  G11C13/0028 ,  G11C13/0061 ,  G11C13/0069 ,  G11C2013/0071 ,  G11C2213/79

Abstract: A resistive memory system, a driver circuit thereof and a method for setting resistances thereof are provided. The resistive memory system includes a memory array, a row selection circuit, a first control circuit and a second control circuit. The memory array has a plurality of resistive memory cells. The row selection circuit is used for activating the resistive memory cells. The first control circuit and the second control circuit are coupled to the resistive memory cells. When each of resistive memory cells is set, the first control circuit and the second control circuit respectively provide a set voltage and a ground voltage to the each of resistive memory cells to form a set current, and the set current is clamped by at least one of the first control circuit and the second control circuit.

Abstract translation: 提供了一种电阻式存储器系统，其驱动电路及其电阻设定方法。 电阻式存储器系统包括存储器阵列，行选择电路，第一控制电路和第二控制电路。 存储器阵列具有多个电阻存储单元。 行选择电路用于激活电阻式存储单元。 第一控制电路和第二控制电路耦合到电阻存储器单元。 当每个电阻性存储器单元被设置时，第一控制电路和第二控制电路分别向每个电阻存储器单元提供一个设定电压和一个接地电压以形成一个设定电流，并且将该设定电流钳位在至少一个 的第一控制电路和第二控制电路。

公开(公告)号：US09443588B2

公开(公告)日：2016-09-13

申请号：US14749651

申请日：2015-06-25

Applicant: Industrial Technology Research Institute

Inventor： Pei-Ling Tseng ,  Chia-Chen Kuo ,  Shyh-Shyuan Sheu ,  Meng-Fan Chang

IPC: G11C11/00 ,  G11C11/36 ,  G11C13/00

CPC classification number: G11C13/0097 ,  G11C13/0023 ,  G11C13/0026 ,  G11C13/0028 ,  G11C13/0061 ,  G11C13/0069 ,  G11C2013/0071 ,  G11C2213/79

Abstract: A resistive memory system, a driver circuit thereof and a method for setting resistances thereof are provided. The resistive memory system includes a memory array, a row selection circuit, a first control circuit and a second control circuit. The memory array has a plurality of resistive memory cells. The row selection circuit is used for activating the resistive memory cells. The first control circuit and the second control circuit are coupled to the resistive memory cells. When each of resistive memory cells is set, the first control circuit and the second control circuit respectively provide a set voltage and a ground voltage to the each of resistive memory cells to form a set current, and the set current is clamped by at least one of the first control circuit and the second control circuit.

Abstract translation: 提供了一种电阻式存储器系统，其驱动电路及其电阻设定方法。 电阻式存储器系统包括存储器阵列，行选择电路，第一控制电路和第二控制电路。 存储器阵列具有多个电阻存储单元。 行选择电路用于激活电阻式存储单元。 第一控制电路和第二控制电路耦合到电阻存储器单元。 当每个电阻性存储器单元被设置时，第一控制电路和第二控制电路分别向每个电阻存储器单元提供一个设定电压和一个接地电压以形成一个设定电流，并且将该设定电流钳位在至少一个 的第一控制电路和第二控制电路。