公开(公告)号：US20240250056A1

公开(公告)日：2024-07-25

申请号：US18098979

申请日：2023-01-19

Applicant: Infineon Technologies AG

Inventor： Mohd Afiz Hashim ,  Zhi Yuan Goh ,  Subaramaniym Senivasan ,  Azmil Abdullah ,  Varun Parthasarathy ,  Kah Wai Lau ,  Ahmad Zulkarnain Samsudin

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/495

CPC classification number: H01L24/40 ,  H01L23/3107 ,  H01L23/49517 ,  H01L24/05 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05005 ,  H01L2224/40175 ,  H01L2224/48247 ,  H01L2224/73271 ,  H01L2924/01029 ,  H01L2924/014

Abstract: A semiconductor package includes: a substrate having a metallic surface; a semiconductor die metallurgically bonded to the metallic surface of the substrate by a first solder joint; and a solder wetting structure metallurgically welded to the metallic surface of the substrate outside a perimeter of the semiconductor die and adjacent to one or more side faces of the semiconductor die. Excess solder squeezed out from under the semiconductor die is metallurgically bonded to the solder wetting structure. Methods of producing the semiconductor package and solder wetting structure are also described.