公开(公告)号：US11942452B2

公开(公告)日：2024-03-26

申请号：US16939130

申请日：2020-07-27

Applicant: Infineon Technologies AG

Inventor： Christian Robert Mueller ,  Andressa Colvero Schittler ,  Daniel Domes ,  Andre Lenze

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/049 ,  H01L23/367 ,  H01L23/538 ,  H01L23/64

CPC classification number: H01L25/0655 ,  H01L23/049 ,  H01L23/367 ,  H01L23/5383 ,  H01L23/642 ,  H01L24/48 ,  H01L2224/48225

Abstract: A semiconductor module arrangement includes a housing, a first semiconductor substrate arranged inside the housing, a second semiconductor substrate arranged inside the housing, a first plurality of controllable semiconductor elements, and a second plurality of controllable semiconductor elements. During operation of the semiconductor module arrangement, each controllable semiconductor element of the first plurality of controllable semiconductor elements generates switching losses and conduction losses, the switching losses being greater than the conduction losses. Further during operation of the semiconductor module arrangement, each controllable semiconductor element of the second plurality of controllable semiconductor elements generates switching losses and conduction losses, the conduction losses being greater than the switching losses. At least a first sub-group of the first plurality of controllable semiconductor elements is arranged on the first semiconductor substrate, and at least a first sub-group of the second plurality of controllable semiconductor elements is arranged on the second semiconductor substrate.

公开(公告)号：US20210043605A1

公开(公告)日：2021-02-11

申请号：US16939130

申请日：2020-07-27

Applicant: Infineon Technologies AG

Inventor： Christian Robert Mueller ,  Andressa Colvero Schittler ,  Daniel Domes ,  Andre Lenze

IPC: H01L25/065 ,  H01L23/538 ,  H01L23/00 ,  H01L23/367 ,  H01L23/64 ,  H01L23/049

Abstract: A semiconductor module arrangement includes a housing, a first semiconductor substrate arranged inside the housing, a second semiconductor substrate arranged inside the housing, a first plurality of controllable semiconductor elements, and a second plurality of controllable semiconductor elements. During operation of the semiconductor module arrangement, each controllable semiconductor element of the first plurality of controllable semiconductor elements generates switching losses and conduction losses, the switching losses being greater than the conduction losses. Further during operation of the semiconductor module arrangement, each controllable semiconductor element of the second plurality of controllable semiconductor elements generates switching losses and conduction losses, the conduction losses being greater than the switching losses. At least a first sub-group of the first plurality of controllable semiconductor elements is arranged on the first semiconductor substrate, and at least a first sub-group of the second plurality of controllable semiconductor elements is arranged on the second semiconductor substrate.