公开(公告)号：US20200279799A1

公开(公告)日：2020-09-03

申请号：US16776026

申请日：2020-01-29

Applicant: Infineon Technologies AG

Inventor： Dirk AHLERS ,  Frank DAECHE ,  Daniel SCHLEISSER ,  Thomas STOEK

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48

Abstract: A semiconductor arrangement comprises a leadframe comprising at least a first and a second carrier, the first and second carriers being arranged laterally besides each other, at least a first and a second semiconductor die, the first semiconductor die being arranged on and electrically coupled to the first carrier and the second semiconductor die being arranged on and electrically coupled to the second carrier, and an interconnection configured to mechanically fix the first carrier to the second carrier and to electrically insulate the first carrier from the second carrier, wherein the first and second semiconductor dies are at least partially exposed to the outside.

公开(公告)号：US20170141105A1

公开(公告)日：2017-05-18

申请号：US15351816

申请日：2016-11-15

Applicant: Infineon Technologies AG

Inventor： Andreas MEISER ,  Dirk AHLERS ,  Till SCHLOESSER

IPC: H01L27/088 ,  H03K17/687 ,  H01L29/78

Abstract: A semiconductor device includes a first transistor and a second transistor in a semiconductor substrate. The first transistor includes a first drain contact electrically connected to a first drain region, the first drain contact including a first drain contact portion and a second drain contact portion. The first drain contact portion includes a drain conductive material in direct contact with the first drain region. The second transistor includes a second source contact electrically connected to a second source region. The second source contact includes a first source contact portion and a second source contact portion. The first source contact portion includes a source conductive material in direct contact with the second source region.