公开(公告)号：US20200044036A1

公开(公告)日：2020-02-06

申请号：US16601921

申请日：2019-10-15

Applicant: Infineon Technologies AG

Inventor： Andreas MEISER ,  Oliver HAEBERLEN

IPC: H01L29/40 ,  H01L21/3115 ,  H01L29/417 ,  H01L29/66 ,  H01L29/06 ,  H01L29/78

Abstract: A semiconductor device includes a transistor in a semiconductor body having a main surface. The transistor includes a source region; a drain region; a body region; a drift zone; a gate electrode at the body region, the body region and the drift zone being disposed along a first direction between the source region and the drain region, and the first direction being parallel to the main surface; a field plate disposed in each of a plurality of field plate trenches, each of the field plate trenches having a longitudinal axis extending along the first direction; and a field dielectric layer between the field plate and the drift zone, a thickness of the field dielectric layer at a bottom of each of the field plate trenches gradually increases along the first direction, the thickness being measured along a depth direction of the plurality of field plate trenches.

公开(公告)号：US20170141105A1

公开(公告)日：2017-05-18

申请号：US15351816

申请日：2016-11-15

Applicant: Infineon Technologies AG

Inventor： Andreas MEISER ,  Dirk AHLERS ,  Till SCHLOESSER

IPC: H01L27/088 ,  H03K17/687 ,  H01L29/78

Abstract: A semiconductor device includes a first transistor and a second transistor in a semiconductor substrate. The first transistor includes a first drain contact electrically connected to a first drain region, the first drain contact including a first drain contact portion and a second drain contact portion. The first drain contact portion includes a drain conductive material in direct contact with the first drain region. The second transistor includes a second source contact electrically connected to a second source region. The second source contact includes a first source contact portion and a second source contact portion. The first source contact portion includes a source conductive material in direct contact with the second source region.

公开(公告)号：US20160060105A1

公开(公告)日：2016-03-03

申请号：US14832001

申请日：2015-08-21

Applicant: Infineon Technologies AG

Inventor： Stefan KOLB ,  Andreas MEISER ,  Till SCHLOESSER ,  Wolfgang WERNER

IPC: B81C1/00 ,  B81B3/00

CPC classification number: B81C1/00182 ,  B81C2201/019

Abstract: A method for producing a MEMS device comprises forming a semiconductor layer stack, the semiconductor layer stack comprising at least a first monocrystalline semiconductor layer, a second monocrystalline semiconductor layer and a third monocrystalline semiconductor layer, the second monocrystalline semiconductor layer formed between the first and third monocrystalline semiconductor layers. A semiconductor material of the second monocrystalline semiconductor layer is different from semiconductor materials of the first and third monocrystalline semiconductor layers. After forming the semiconductor layer stack, at least a portion of each of the first and third monocrystalline semiconductor layers is concurrently etched.

Abstract translation: 一种用于制造MEMS器件的方法包括形成半导体层堆叠，所述半导体层堆叠包括至少第一单晶半导体层，第二单晶半导体层和第三单晶半导体层，所述第二单晶半导体层形成在第一和第三 单晶半导体层。 第二单晶半导体层的半导体材料与第一和第三单晶半导体层的半导体材料不同。 在形成半导体层堆叠之后，同时蚀刻第一和第三单晶半导体层中的每一个的至少一部分。

公开(公告)号：US20170236931A1

公开(公告)日：2017-08-17

申请号：US15429282

申请日：2017-02-10

Applicant: Infineon Technologies AG

Inventor： Andreas MEISER ,  Till SCHLOESSER

IPC: H01L29/78 ,  H01L23/34 ,  H01L23/528 ,  H01L29/66 ,  H01L29/10 ,  H01L29/423

CPC classification number: H01L29/7804 ,  H01L23/34 ,  H01L23/5283 ,  H01L27/0705 ,  H01L27/0727 ,  H01L29/0646 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/404 ,  H01L29/407 ,  H01L29/41708 ,  H01L29/4175 ,  H01L29/42304 ,  H01L29/4236 ,  H01L29/66712 ,  H01L29/732 ,  H01L29/7813 ,  H01L29/7826 ,  H01L29/7835 ,  H01L29/8613

Abstract: A semiconductor device includes a transistor in a semiconductor substrate having a first main surface. The transistor includes a source region, a source contact, the source contact including a first and second source contact portion, and a gate electrode in a gate trench in the first main surface adjacent to a body region. The body region and a drift zone are disposed along a first direction parallel to the first main surface between the source region and a drain region. The second source contact portion is disposed at a second main surface of the semiconductor substrate. The first source contact portion includes a source conductive material in direct contact with the source region, the first source contact portion further including a portion of the semiconductor substrate between the source conductive material and the second source contact portion. The semiconductor device further includes a temperature sensor in the semiconductor substrate.

公开(公告)号：US20170033191A1

公开(公告)日：2017-02-02

申请号：US15216889

申请日：2016-07-22

Applicant: Infineon Technologies AG

Inventor： Andreas MEISER ,  Oliver HAEBERLEN

IPC: H01L29/40 ,  H01L29/10 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/408 ,  H01L21/31155 ,  H01L29/0696 ,  H01L29/0865 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/401 ,  H01L29/404 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/66696 ,  H01L29/66704 ,  H01L29/7825

Abstract: A semiconductor device is provided that includes a transistor in a semiconductor body having a main surface. The transistor includes a source region, a drain region, a body region, a drift zone, and a gate electrode at the body region. The body region and the drift zone are disposed along a first direction between the source region and the drain region. The first direction is parallel to the main surface. The semiconductor device further includes a field plate disposed in field plate trenches extending along the first direction in the drift zone, and a field dielectric layer between the field plate and the drift zone. A thickness of the field dielectric layer gradually increases along the first direction from a portion adjacent to the source region to a portion adjacent to the drain region.

Abstract translation: 提供一种半导体器件，其包括具有主表面的半导体主体中的晶体管。 晶体管包括源区域，漏极区域，体区域，漂移区域和在体区域处的栅电极。 主体区域和漂移区域沿着源极区域和漏极区域之间的第一方向设置。 第一个方向平行于主表面。 半导体器件还包括设置在沿漂移区中的第一方向延伸的场板沟槽中的场板和场板与漂移区之间的场介电层。 场介电层的厚度沿着第一方向从与源极区相邻的部分逐渐增加到与漏极区相邻的部分。