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公开(公告)号：US09577852B2
公开(公告)日：2017-02-21
申请号：US14531343
申请日：2014-11-03
Applicant: Infineon Technologies AG
Inventor： Maciej Wojnowski , Alexander Glas , Hubert Werthmann , Josef-Paul Schaffer , Francesca Arcioni , Gabriele Bettineschi
CPC classification number: H04L25/085 , H02H9/046 , H04L25/0276
Abstract: A common-mode suppressor for eliminating common-mode noise in high frequency differential data transmission systems and an associated method includes a long coiled differential transmission line configured to transfer data between a source and a load. The differential transmission line comprises a first conductive wire and a second conductive wire which are inductively and capacitively coupled and are laterally aligned or vertically aligned with each other. Further, the differential transmission line is matched for differential signals and un-matched for common-mode noise.
Abstract translation: 用于消除高频差分数据传输系统中的共模噪声的共模抑制器及相关方法包括：构造成在源和负载之间传送数据的长线圈差动传输线。 差分传输线包括电感和电容耦合并且彼此横向对准或垂直对准的第一导线和第二导线。 此外，差分传输线被匹配用于差分信号，并且对于共模噪声是不匹配的。
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2.发明授权Semiconductor device comprising a fuse structure and a method for manufacturing such semiconductor device 有权包括熔丝结构的半导体器件和用于制造这种半导体器件的方法公开(公告)号：US09165828B2
公开(公告)日：2015-10-20
申请号：US14153322
申请日：2014-01-13
Applicant: Infineon Technologies AG
Inventor： Gabriele Bettineschi , Uwe Seidel , Wolfgang Walter , Michael Schrenk , Hubert Werthmann
IPC: H01L21/768 , H01L23/525
CPC classification number: H01L21/76886 , H01L23/5256 , H01L2224/13
Abstract: A semiconductor device comprises a semiconductor substrate, an anorganic isolation layer on the semiconductor substrate and a metallization layer on the anorganic isolation layer. The metallization layer comprises a fuse structure. At least in an area of the fuse structure the metallization layer and the anorganic isolation layer have a common interface.
Abstract translation: 半导体器件包括半导体衬底，半导体衬底上的无机隔离层和有机隔离层上的金属化层。 金属化层包括熔丝结构。 至少在熔丝结构的区域中，金属化层和有机隔离层具有共同的界面。
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3.发明公开公开(公告)号：US20240038756A1
公开(公告)日：2024-02-01
申请号：US17877001
申请日：2022-07-29
Applicant: Infineon Technologies AG
Inventor： Josef-Paul Schaffer , Hubert Werthmann , Juliane Laurer
IPC: H01L27/02
CPC classification number: H01L27/0248
Abstract: A semiconductor device includes a semiconductor body including an upper surface, input and output terminals disposed on the upper surface of the semiconductor body, first and second p-n junction devices that are monolithically integrated in the semiconductor body, and a signal line protection circuit connected between the input and output terminals and comprising a low-pass filter and a voltage clamping device, wherein each of the low-pass filter and the voltage clamping device include the first and second p-n junction devices.
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Patent Agency Ranking
公开(公告)号：US09548293B2
公开(公告)日：2017-01-17
申请号：US14180980
申请日：2014-02-14
Applicant: Infineon Technologies AG
Inventor： Hubert Werthmann
IPC: H01L23/62 , H01L27/02 , H01L29/66 , H01L29/868 , H01L29/20
CPC classification number: H01L27/0255 , H01L29/2003 , H01L29/66204 , H01L29/868
Abstract: An ESD (electrostatic discharge) protection device includes a first III-nitride p-i-n diode and a second III-nitride p-i-n diode connected to the first III-nitride p-i-n diode in an antiparallel arrangement configured to provide voltage clamping at 5V or less under forward bias of either the first or second III-nitride p-i-n diode for transient current in both forward and reverse directions. A corresponding method of manufacturing the ESD protection device is also provided.
Abstract translation: ESD（静电放电）保护装置包括以反并联装置连接到第一III族氮化物pin二极管的第一III族氮化物pin二极管和第二III族氮化物pin二极管，其被配置为在5V或更小的正向偏压下提供5V或更小的电压钳位 用于正向和反向两个瞬态电流的第一或第二III-氮化物二极管二极管。 还提供了制造ESD保护装置的相应方法。
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公开(公告)号：US20160127157A1
公开(公告)日：2016-05-05
申请号：US14531343
申请日：2014-11-03
Applicant: Infineon Technologies AG
Inventor： Maciej Wojnowski , Alexander Glas , Hubert Werthmann , Josef-Paul Schaffer , Francesca Arcioni , Gabriele Bettineschi
CPC classification number: H04L25/085 , H02H9/046 , H04L25/0276
Abstract: A common-mode suppressor for eliminating common-mode noise in high frequency differential data transmission systems and an associated method includes a long coiled differential transmission line configured to transfer data between a source and a load. The differential transmission line comprises a first conductive wire and a second conductive wire which are inductively and capacitively coupled and are laterally aligned or vertically aligned with each other. Further, the differential transmission line is matched for differential signals and un-matched for common-mode noise.
Abstract translation: 用于消除高频差分数据传输系统中的共模噪声的共模抑制器及相关方法包括：构造成在源和负载之间传送数据的长线圈差动传输线。 差分传输线包括电感和电容耦合并且彼此横向对准或垂直对准的第一导线和第二导线。 此外，差分传输线被匹配用于差分信号，并且对于共模噪声是不匹配的。
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公开(公告)号：US20150236008A1
公开(公告)日：2015-08-20
申请号：US14180980
申请日：2014-02-14
Applicant: INFINEON TECHNOLOGIES AG
Inventor： Hubert Werthmann
IPC: H01L27/02 , H01L29/868 , H01L29/20 , H01L29/66
CPC classification number: H01L27/0255 , H01L29/2003 , H01L29/66204 , H01L29/868
Abstract: An ESD (electrostatic discharge) protection device includes a first III-nitride p-i-n diode and a second III-nitride p-i-n diode connected to the first III-nitride p-i-n diode in an antiparallel arrangement configured to provide voltage clamping at 5V or less under forward bias of either the first or second III-nitride p-i-n diode for transient current in both forward and reverse directions. A corresponding method of manufacturing the ESD protection device is also provided.
Abstract translation: ESD（静电放电）保护装置包括以反并联装置连接到第一III族氮化物pin二极管的第一III族氮化物pin二极管和第二III族氮化物pin二极管，其被配置为在5V或更小的正向偏压下提供5V或更小的电压钳位 用于正向和反向两个瞬态电流的第一或第二III-氮化物二极管二极管。 还提供了制造ESD保护装置的相应方法。
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7.发明授权公开(公告)号：US12125841B2
公开(公告)日：2024-10-22
申请号：US17877001
申请日：2022-07-29
Applicant: Infineon Technologies AG
Inventor： Josef-Paul Schaffer , Hubert Werthmann , Juliane Laurer
IPC: H01L27/02
CPC classification number: H01L27/0248
Abstract: A semiconductor device includes a semiconductor body including an upper surface, input and output terminals disposed on the upper surface of the semiconductor body, first and second p-n junction devices that are monolithically integrated in the semiconductor body, and a signal line protection circuit connected between the input and output terminals and comprising a low-pass filter and a voltage clamping device, wherein each of the low-pass filter and the voltage clamping device include the first and second p-n junction devices.
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8.发明申请Semiconductor Device Comprising a Fuse Structure and a Method for Manufacturing such Semiconductor Device 审中-公开包含熔丝结构的半导体器件和制造这种半导体器件的方法公开(公告)号：US20140127895A1
公开(公告)日：2014-05-08
申请号：US14153322
申请日：2014-01-13
Applicant: INFINEON TECHNOLOGIES AG
Inventor： Gabriele Bettineschi , Uwe Seidel , Wolfgang Walter , Michael Schrenk , Hubert Werthmann
IPC: H01L21/768
CPC classification number: H01L21/76886 , H01L23/5256 , H01L2224/13
Abstract: A semiconductor device comprises a semiconductor substrate, an anorganic isolation layer on the semiconductor substrate and a metallization layer on the anorganic isolation layer. The metallization layer comprises a fuse structure. At least in an area of the fuse structure the metallization layer and the anorganic isolation layer have a common interface.
Abstract translation: 半导体器件包括半导体衬底，半导体衬底上的无机隔离层和有机隔离层上的金属化层。 金属化层包括熔丝结构。 至少在熔丝结构的区域中，金属化层和有机隔离层具有共同的界面。
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