公开(公告)号：US09748378B2

公开(公告)日：2017-08-29

申请号：US14656041

申请日：2015-03-12

Applicant: Infineon Technologies AG

Inventor： Karoline Koepp ,  Andreas Meiser ,  Till Schloesser

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66 ,  H01L29/06

CPC classification number: H01L29/7825 ,  H01L21/823456 ,  H01L21/823481 ,  H01L21/823487 ,  H01L27/088 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/66681 ,  H01L29/7813 ,  H01L29/7823 ,  H01L29/7835

Abstract: A semiconductor device includes a transistor in a semiconductor substrate having a first main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, and a gate electrode adjacent to at least two sides of the channel region. The gate electrode is disposed in trenches extending in a first direction parallel to the first main surface. The gate electrode is electrically coupled to a gate terminal. The channel region and the drift zone are disposed along the first direction between the source region and the drain region. The semiconductor device further includes a conductive layer beneath the gate electrode and insulated from the gate electrode. The conductive layer is electrically connected to the gate terminal.

公开(公告)号：US20160268423A1

公开(公告)日：2016-09-15

申请号：US14656041

申请日：2015-03-12

Applicant: Infineon Technologies AG

Inventor： Karoline Koepp ,  Andreas Meiser ,  Till Schloesser

IPC: H01L29/78 ,  H01L29/40 ,  H01L27/088

CPC classification number: H01L29/7825 ,  H01L21/823456 ,  H01L21/823481 ,  H01L21/823487 ,  H01L27/088 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/66681 ,  H01L29/7813 ,  H01L29/7823 ,  H01L29/7835

Abstract: A semiconductor device includes a transistor in a semiconductor substrate having a first main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, and a gate electrode adjacent to at least two sides of the channel region. The gate electrode is disposed in trenches extending in a first direction parallel to the first main surface. The gate electrode is electrically coupled to a gate terminal. The channel region and the drift zone are disposed along the first direction between the source region and the drain region. The semiconductor device further includes a conductive layer beneath the gate electrode and insulated from the gate electrode. The conductive layer is electrically connected to the gate terminal.

Abstract translation: 半导体器件包括具有第一主表面的半导体衬底中的晶体管。 晶体管包括源极区域，漏极区域，沟道区域，漂移区域和与沟道区域的至少两侧相邻的栅电极。 栅电极设置在与第一主表面平行的第一方向上延伸的沟槽中。 栅极电连接到栅极端子。 沟道区域和漂移区沿着源极区域和漏极区域之间的第一方向设置。 半导体器件还包括在栅电极下方并与栅电极绝缘的导电层。 导电层电连接到栅极端子。

公开(公告)号：US09997608B2

公开(公告)日：2018-06-12

申请号：US15404285

申请日：2017-01-12

Applicant: Infineon Technologies AG

Inventor： Karoline Koepp ,  Herbert Gietler

IPC: H01L29/423 ,  H01L29/40 ,  H01L29/417 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L29/4238 ,  H01L29/0696 ,  H01L29/40 ,  H01L29/401 ,  H01L29/41725 ,  H01L29/41741 ,  H01L29/7813

Abstract: Disclosed is a transistor device. The transistor device includes a plurality of device cells each having an active device region integrated in a semiconductor body and electrically connected to a contact layer. The contact layer includes a plurality of layer sections separated from each other by a separation layer. A resistivity of the separation layer is at least 100 times the resistivity of the layer sections.

公开(公告)号：US20170200795A1

公开(公告)日：2017-07-13

申请号：US15404285

申请日：2017-01-12

Applicant: Infineon Technologies AG

Inventor： Karoline Koepp ,  Herbert Gietler

IPC: H01L29/417 ,  H01L29/40 ,  H01L29/423

CPC classification number: H01L29/4238 ,  H01L29/0696 ,  H01L29/40 ,  H01L29/401 ,  H01L29/41725 ,  H01L29/41741 ,  H01L29/7813

Abstract: Disclosed is a transistor device. The transistor device includes a plurality of device cells each having an active device region integrated in a semiconductor body and electrically connected to a contact layer. The contact layer includes a plurality of layer sections separated from each other by a separation layer. A resistivity of the separation layer is at least 100 times the resistivity of the layer sections.