公开(公告)号：US09760111B2

公开(公告)日：2017-09-12

申请号：US14142161

申请日：2013-12-27

Applicant: Infineon Technologies AG

Inventor： Thorsten Hinderer ,  Markus Hopfner

IPC: G06F1/04 ,  G06F1/06 ,  G06F1/12 ,  G06F13/42

Abstract: A method for synchronizing a data signal in a bus environment is suggested, the method may include providing multiple clock phases based on a reference oscillator; determining a phase out of the multiple clock phases for a transition of a data signal; and synchronizing the data signal based on the phase determined.

公开(公告)号：US09280501B2

公开(公告)日：2016-03-08

申请号：US13871043

申请日：2013-04-26

Applicant: Infineon Technologies AG

Inventor： Markus Hopfner

IPC: H04L12/40 ,  G06F13/36 ,  G06F13/40

CPC classification number: G06F13/36 ,  G06F13/4072 ,  H04L12/40006 ,  H04L12/40032 ,  H04L12/40169 ,  H04L2012/40215 ,  H04L2012/40273

Abstract: A network node is provided, including a device, in particular, an error detection logic, which is deactivated if it is detected that a signal according to a first protocol or a first version of a first protocol is received, and which is not deactivated if it is detected that a signal according to a second, different protocol or a second, different version of the first protocol is received.

Abstract translation: 提供了一种网络节点，包括设备，特别是错误检测逻辑，如果检测到根据第一协议或第一协议的第一版本的信号被接收到的信号而被去激活，并且如果 检测到根据第二协议或第二不同版本的第一协议的信号被接收。

公开(公告)号：US20140215109A1

公开(公告)日：2014-07-31

申请号：US13871043

申请日：2013-04-26

Applicant: Infineon Technologies AG

Inventor： Markus Hopfner

IPC: G06F13/36

CPC classification number: G06F13/36 ,  G06F13/4072 ,  H04L12/40006 ,  H04L12/40032 ,  H04L12/40169 ,  H04L2012/40215 ,  H04L2012/40273

Abstract: A network node is provided, including a device, in particular, an error detection logic, which is deactivated if it is detected that a signal according to a first protocol or a first version of a first protocol is received, and which is not deactivated if it is detected that a signal according to a second, different protocol or a second, different version of the first protocol is received.

Abstract translation: 提供了一种网络节点，包括设备，特别是错误检测逻辑，如果检测到根据第一协议或第一协议的第一版本的信号被接收到的信号而被去激活，并且如果 检测到根据第二协议或第二不同版本的第一协议的信号被接收。

公开(公告)号：US09791887B2

公开(公告)日：2017-10-17

申请号：US14142161

申请日：2013-12-27

Applicant: Infineon Technologies AG

Inventor： Thorsten Hinderer ,  Markus Hopfner

IPC: G06F1/04 ,  G06F1/06 ,  G06F1/12 ,  G06F13/42

CPC classification number: G06F1/04 ,  G06F1/06 ,  G06F1/12 ,  G06F13/42 ,  G06F13/423

Abstract: A method for synchronizing a data signal in a bus environment is suggested, the method may include providing multiple clock phases based on a reference oscillator; determining a phase out of the multiple clock phases for a transition of a data signal; and synchronizing the data signal based on the phase determined.