公开(公告)号：US20230369175A1

公开(公告)日：2023-11-16

申请号：US18144464

申请日：2023-05-08

Applicant: Infineon Technologies AG

Inventor： Arthur Unrau ,  Matthias Droste ,  Achim Mücke

IPC: H01L23/492 ,  H01L23/049 ,  H01L23/31 ,  H01L25/07 ,  H01L21/48

CPC classification number: H01L23/492 ,  H01L23/049 ,  H01L23/3107 ,  H01L25/072 ,  H01L21/4875

Abstract: A power semiconductor module arrangement includes: a base plate; substrates arranged on a first surface of the base plate; a connection layer arranged between a different one of the substrates and the base plate and permanently attaching the respective substrate to the base plate; and a spacer arranged between one of the substrates and the base plate and embedded in a material of the respective connection layer. For at least one substrate: either no spacer or one or more of a first kind of spacers having a first height in a vertical direction perpendicular to the first surface of the base plate is arranged below a first half of the respective substrate, and one or more of a second kind of spacers having a second height in the vertical direction is arranged below a second half of the respective substrate, the second height being greater than the first height.