公开(公告)号：US12094806B2

公开(公告)日：2024-09-17

申请号：US17491082

申请日：2021-09-30

申请人： STMicroelectronics S.r.l.

发明人： Agatino Minotti ,  Francesco Salamone ,  Massimiliano Fiorito ,  Alessio Scordia ,  Manuel Ponturo

IPC分类号： H01L23/49 ,  H01L23/373 ,  H01L23/492 ,  H01R12/58 ,  H01R43/02

CPC分类号： H01L23/49 ,  H01L23/3735 ,  H01L23/492 ,  H01R12/585 ,  H01R43/0207

摘要： A blocking element is provided for connecting an electronic, micro-mechanical and/or micro-electro-mechanical component, in particular for controlling the propulsion of an electric vehicle. The pin blocking element is formed by a holed body having a first end, a second end and an axial cavity configured for fittingly accommodating a connecting pin. A first flange projects transversely from the holed body at the first end and a second flange projects transversely from the holed body at the second end. The first flange has a greater area than the second flange and is configured to be ultrasonically soldered to a conductive bearing plate to form a power module.

公开(公告)号：US20240235138A9

公开(公告)日：2024-07-11

申请号：US18494952

申请日：2023-10-26

申请人： Transportation IP Holdings, LLC

发明人： Henry Todd Young ,  Alvaro Jorge Mari Curbelo ,  Jason Daniel Kuttenkuler ,  Tiziana Bertoncelli ,  Sean Patrick Cillessen

IPC分类号： H01R25/16 ,  H01L23/46 ,  H01L23/492 ,  H01L25/11 ,  H01R43/16 ,  H02G5/00 ,  H02M7/00 ,  H05K7/20

CPC分类号： H01R25/162 ,  H01L23/46 ,  H01L23/492 ,  H01L25/115 ,  H01R43/16 ,  H02G5/005 ,  H02M7/003 ,  H05K7/2089 ,  H05K7/20927 ,  H02M7/537

摘要： A bus bar includes a load terminal connector comprising a conductive plate that extends from a first edge to an opposite second edge and extends from a third edge to an opposite fourth edge. The third and fourth edges extend from the first edge to the second edge. The plate includes a window opening located between the first and second edges and between the third and fourth edges. The plate also includes a slot extending into the plate from the first edge to the window opening. The plate includes first and second sets of openings configured to receive connections with first and second power terminals of switch packages. The first set of openings and the second set of openings are located on opposite sides of the slot.

公开(公告)号：US11887942B2

公开(公告)日：2024-01-30

申请号：US17098662

申请日：2020-11-16

申请人： Nanjing Silergy Micro Technology Co., Ltd.

发明人： Ke Dai ,  Jian Wei ,  Jiajia Yan

IPC分类号： H01L23/64 ,  H01L23/49 ,  H01L23/492 ,  H01L23/00 ,  H01L25/16 ,  H02M3/158

CPC分类号： H01L23/642 ,  H01L23/49 ,  H01L23/492 ,  H01L23/645 ,  H01L24/16 ,  H01L25/16 ,  H02M3/158 ,  H01L2224/16245

摘要： A package structure for a power supply module, can include: a die and a capacitive element that are separated from each other and arranged on different horizontal planes with different heights along a vertical direction of the package structure; connection structures that connect to the die and to the capacitive element; where a current loop comprising at least two parallel current paths on different horizontal planes with different heights along the vertical direction of the package structure is formed; and where the current loop passes through the die, the capacitive element, and the connection structures, and directions of currents of the two parallel current paths are at least partially opposite to each other in order to decrease electromagnetic interference.

公开(公告)号：US20240006395A1

公开(公告)日：2024-01-04

申请号：US17853778

申请日：2022-06-29

申请人： Intel Corporation

发明人： Sagar Suthram ,  Debendra Mallik ,  Wilfred Gomes ,  Pushkar Sharad Ranade ,  Nitin A. Deshpande ,  Omkar G. Karhade ,  Ravindranath Vithal Mahajan ,  Abhishek A. Sharma

IPC分类号： H01L25/16 ,  H01L23/492 ,  H01L23/522 ,  H01L23/528 ,  H01L23/04 ,  H01L23/46 ,  H01L23/48 ,  H01L23/00

CPC分类号： H01L25/167 ,  H01L23/492 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/04 ,  H01L2224/80895 ,  H01L23/481 ,  H01L24/08 ,  H01L24/80 ,  H01L24/96 ,  H01L2224/08146 ,  H01L23/46

摘要： Embodiments of a microelectronic assembly comprise: a plurality of microelectronic sub-assemblies arranged in a coplanar array, each microelectronic sub-assembly having a first side and an opposing second side; a first conductive plate coupled to the first sides of the microelectronic sub-assemblies; and a second conductive plate coupled to the second sides of the microelectronic sub-assemblies. The first conductive plate and the second conductive plate comprise sockets corresponding to each of the microelectronic sub-assemblies, and each microelectronic sub-assembly comprises a first plurality of integrated circuit (IC) dies coupled on one end to a first IC die and on an opposing end to a second IC die; and a second plurality of IC dies coupled to the first IC die and to the second IC die.

公开(公告)号：US11764158B2

公开(公告)日：2023-09-19

申请号：US17306807

申请日：2021-05-03

申请人： Intel Corporation

发明人： Amruthavalli Pallavi Alur ,  Sri Ranga Sai Boyapati ,  Robert Alan May ,  Islam A. Salama ,  Robert L. Sankman

IPC分类号： H01L23/538 ,  H01L23/498 ,  H01L23/00 ,  H01L25/065 ,  H01L21/48 ,  H01L25/00 ,  H01L25/18 ,  H01L23/31 ,  H01L21/66 ,  H01L21/683 ,  H01L25/11 ,  H01L23/492

CPC分类号： H01L23/5381 ,  H01L21/486 ,  H01L21/4853 ,  H01L21/4857 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/18 ,  H01L25/50 ,  H01L21/6835 ,  H01L22/14 ,  H01L23/492 ,  H01L23/5383 ,  H01L24/14 ,  H01L24/17 ,  H01L25/115 ,  H01L25/117 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/0401 ,  H01L2224/1403 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/1703 ,  H01L2224/17106 ,  H01L2224/18 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1436 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/1436 ,  H01L2924/00012

摘要： An embedded multi-die interconnect bridge apparatus and method includes photolithographically formed interconnects coupled to laser-drilled interconnects. Several structures in the embedded multi-die interconnect bridge apparatus exhibit characteristic planarization during fabrication and assembly.

公开(公告)号：US11749622B2

公开(公告)日：2023-09-05

申请号：US17363446

申请日：2021-06-30

申请人： SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.

发明人： Chihoko Akiyama

IPC分类号： H01L23/58 ,  H01L23/00 ,  H01L23/492 ,  H01L29/06 ,  H01L29/20 ,  H01L29/778 ,  H01L29/423 ,  H01L29/47 ,  H01L29/40 ,  H01L29/66 ,  H01L21/02 ,  H01L21/265 ,  H01L21/311 ,  H01L29/205 ,  H01L29/45 ,  H01L21/3213 ,  H01L21/027

CPC分类号： H01L23/585 ,  H01L23/492 ,  H01L23/564 ,  H01L24/05 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L29/0684 ,  H01L21/0217 ,  H01L21/0254 ,  H01L21/0272 ,  H01L21/0277 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/2654 ,  H01L21/31144 ,  H01L21/32139 ,  H01L24/03 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/402 ,  H01L29/42316 ,  H01L29/452 ,  H01L29/475 ,  H01L29/66462 ,  H01L29/7786 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/03614 ,  H01L2224/04042 ,  H01L2224/05582 ,  H01L2224/05644 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/32245 ,  H01L2224/73265 ,  H01L2924/1033 ,  H01L2924/10344 ,  H01L2924/13064 ,  H01L2924/30111

摘要： A field effect transistor includes: a semiconductor region including a first inactive region, an active region, and a second inactive region arranged side by side in a first direction; a gate electrode, a source electrode, and a drain electrode on the active region; a gate pad on the first inactive region; a gate guard on and in contact with the semiconductor region, the gate guard being apart from the gate pad and located between an edge on the first inactive region side of the semiconductor region and the gate pad; a drain pad on the second inactive region; a drain guard on and in contact with the semiconductor region, the drain guard being apart from the drain pad and located between an edge on the second inactive region side of the semiconductor region and the drain pad; and a metal film electrically connected to the gate guard.

公开(公告)号：US20230187323A1

公开(公告)日：2023-06-15

申请号：US17975444

申请日：2022-10-27

申请人： FUJI ELECTRIC CO., LTD.

发明人： Shinji TADA ,  Yuma MURATA

IPC分类号： H01L23/495 ,  H01L23/04 ,  H01L23/492 ,  H01L23/06 ,  H01L23/00

CPC分类号： H01L23/49537 ,  H01L23/04 ,  H01L23/06 ,  H01L23/492 ,  H01L24/09 ,  H01L2224/0903

摘要： A semiconductor device, including a case that has a first power terminal including a first bonding area and a second power terminal including a second bonding area, and an insulating unit located between the first power terminal and the second power terminal, and having a shape of a flat plate, the insulating unit being bonded to the case. The insulating unit has a first insulating portion in a sheet form, and a second insulating portion which covers an upper surface, a lower surface, or both the upper and lower surfaces, of the first insulating portion. The first bonding area and the second bonding area are exposed from the insulating unit and from the case.

公开(公告)号：US11652028B2

公开(公告)日：2023-05-16

申请号：US17160612

申请日：2021-01-28

申请人： Infineon Technologies AG

发明人： Andre Wedi ,  Carsten Ehlers ,  Arthur Unrau

IPC分类号： H01L23/49 ,  H01L21/48 ,  H01L23/08 ,  H01L23/14 ,  H01L23/31 ,  H01L23/492 ,  H01L23/00

CPC分类号： H01L23/49 ,  H01L21/4825 ,  H01L21/4875 ,  H01L23/08 ,  H01L23/14 ,  H01L23/3121 ,  H01L23/492 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/32245 ,  H01L2224/83801

摘要： A power semiconductor device includes a die carrier, a power semiconductor chip coupled to the die carrier by a first solder joint, a sleeve for a pin, the sleeve being coupled to the die carrier by a second solder joint, and a sealing mechanically attaching the sleeve to the die carrier, the sealing being arranged at a lower end of the sleeve, wherein the lower end faces the die carrier, and wherein the sealing does not cover the power semiconductor chip.

公开(公告)号：US11652023B2

公开(公告)日：2023-05-16

申请号：US17078931

申请日：2020-10-23

申请人： HITACHI POWER SEMICONDUCTOR DEVICE, LTD.

发明人： Naoki Takeda ,  Tomohiro Onda ,  Kenya Kawano ,  Hiroshi Shintani ,  Yu Harubeppu ,  Hisashi Tanie

IPC分类号： H01L23/373 ,  H01L23/495 ,  H01L23/492 ,  H01L23/498

CPC分类号： H01L23/3736 ,  H01L23/492 ,  H01L23/49513 ,  H01L23/49562 ,  H01L23/49838

摘要： Provided is a highly reliable semiconductor device capable of reducing stress generated in a semiconductor element even when a highly elastic joining material such as a Pb-free material is used in a power semiconductor having a double-sided mounting structure. The semiconductor device includes a semiconductor element including a gate electrode only on one surface, an upper electrode connected to the surface of the semiconductor element on which the gate electrode is provided, and a lower electrode connected to a surface opposite to the surface of the semiconductor element on which the gate electrode is provided. A connection end portion of the upper electrode with the surface of the semiconductor element on which the gate electrode is provided is located inside an end portion of the surface of the semiconductor element on which the gate electrode is provided, and a connection end portion of the lower electrode with the opposite surface of the semiconductor element is located inside an end portion of the opposite surface of the semiconductor element.

公开(公告)号：US20190198428A1

公开(公告)日：2019-06-27

申请号：US16254049

申请日：2019-01-22

申请人： WASEDA UNIVERSITY

发明人： Kohei Tatsumi

IPC分类号： H01L23/482 ,  H01L23/12 ,  H01L23/492 ,  H01L25/07 ,  H01L23/367 ,  H01L25/00 ,  H01L21/48 ,  H01L21/56

CPC分类号： H01L23/482 ,  H01L21/4853 ,  H01L21/561 ,  H01L23/12 ,  H01L23/367 ,  H01L23/492 ,  H01L25/07 ,  H01L25/072 ,  H01L25/18 ,  H01L25/50

摘要： A power semiconductor module device includes: a plurality of semiconductor elements that are arranged at intervals and flush with each other on a plane; an insulating support that fixes the semiconductor elements; a first thick-film plating layer that is formed as a first-surface-side electrode that electrically connects the semiconductor elements to each other on at least one surface of a front surface side and a rear surface side. The first thick-film plating layer supports the semiconductor elements from at least one of an upper direction and a lower direction.