公开(公告)号：US20190181964A1

公开(公告)日：2019-06-13

申请号：US16212883

申请日：2018-12-07

Applicant: Infineon Technologies AG

Inventor： Niels CHRISTOFFERS ,  Vincenzo FIORE ,  Helmut KOLLMANN ,  Christian RAP ,  Jochen O. SCHRATTENECKER ,  Peter UNTERKIRCHER ,  Christoph WAGNER

IPC: H04B17/20 ,  H04B1/16 ,  H04L27/12

CPC classification number: H04B17/20 ,  G01S7/4021 ,  H04B1/16 ,  H04B17/0085 ,  H04B17/19 ,  H04B17/29 ,  H04L27/12

Abstract: The description is of a circuit which, according to one example embodiment, comprises the following: an input circuit node for receiving an RF oscillator signal; a test signal generator circuit, which comprises at least one modulator and which is embodied to generate an RF test signal by modulating the RF oscillator signal. Further, the circuit comprises at least one receive channel with a receiver circuit and a coupler, which is embodied to feed the RF test signal into the receiver circuit.

公开(公告)号：US20210373145A1

公开(公告)日：2021-12-02

申请号：US17397271

申请日：2021-08-09

Applicant: Infineon Technologies AG

Inventor： Niels CHRISTOFFERS ,  Sanaz HADIPOUR ABKENAR ,  Soumya KRISHNAPURAM SIREESH ,  Christoph WAGNER

IPC: G01S13/34 ,  H03M1/06 ,  G01S13/32 ,  G01S13/36

Abstract: Radar frequency range signals (e.g., 1 to 100 gigahertz) are often generated by upconverting a reference frequency to a transmission frequency, and a received signal may be downconverted to analyze information encoded on the transmission via modulation. Modulation may be achieved via a fractional frequency divider in a phase-locked loop, but fractional spurs may reduce the signal-to-noise ratio. Additionally, the ramp slope may vary due to phase-locked loop momentum. Instead, a clock generator may generate clock signals for a digital front end comprising a digital signal modulator that generates modulated digital values comprising quadrature representations of a radar modulation signal, which are encoded by a radiofrequency digital-to-analog converter (RF-DAC). The RF-DAC analog signal may be upconverted to a radar frequency and transmitted. A receiver may receive, downconvert, and analyze a reflection of the radar transmission, e.g., to perform range detection based on a frequency ramp encoded by the radar transmission.

公开(公告)号：US20230324512A1

公开(公告)日：2023-10-12

申请号：US18194185

申请日：2023-03-31

Applicant: Infineon Technologies AG

Inventor： Niels CHRISTOFFERS

IPC: G01S7/40 ,  G01S7/35

CPC classification number: G01S7/4069 ,  G01S7/40 ,  G01S7/352

Abstract: This description relates to a method for suppressing intermodulation distortion in a digital output signal of a radar device. In one implementation, the method includes—in a first mode—feeding a test signal into a receiving channel, the test signal is fed to a mixer contained in the receiving channel and is downconverted to a baseband, a baseband signal that includes intermodulation products on account of a nonlinearity of the transfer characteristic of the receiving channel being provided at the mixer output. The digital output signal is generated based on the baseband signal. The method further includes—in the first mode—determining an intermodulation product and, on the basis thereof, ascertaining a parameter of a model characterizing the nonlinearity. In a second mode, in which an antenna signal is fed to the mixer—suppressing the intermodulation product in the digital output signal based on the parameter and the baseband signal.

公开(公告)号：US20210391650A1

公开(公告)日：2021-12-16

申请号：US17412694

申请日：2021-08-26

Applicant: Infineon Technologies AG

Inventor： Jochen O. Schrattenecker ,  Niels CHRISTOFFERS ,  Vincenzo FIORE ,  Bernhard GSTOETTENBAUER ,  Helmut KOLLMANN ,  Alexander MELZER ,  Alexander ONIC ,  Rainer STUHLBERGER ,  Mathias ZINNOECKER

IPC: H01Q3/36 ,  G01S7/35 ,  G01S7/40 ,  H03L7/06 ,  G01S13/02 ,  G01S13/34 ,  G01S7/03 ,  G01S13/88

Abstract: A circuit includes a radio frequency (RF) channel including an input node and an output node and being configured to receive an RF oscillator signal at the input node and to provide an RF output signal at the output node; a mixer configured to mix an RF reference signal and an RF test signal representative of the RF output signal to generate a mixer output signal; an analog-to-digital converter configured to sample the mixer output signal in order to provide a sequence of sampled values; and a control circuit configured to provide a sequence of phase offsets by phase-shifting at least one of the RF test signal and the RF reference signal using one or more phase shifters, calculate a spectral value from the sequence of sampled values; and calculate estimated phase information indicating a phase of the RF output signal based on the spectral value.

公开(公告)号：US20190214724A1

公开(公告)日：2019-07-11

申请号：US16244712

申请日：2019-01-10

Applicant: Infineon Technologies AG

Inventor： Jochen O. SCHRATTENECKER ,  Niels CHRISTOFFERS ,  Vincenzo FIORE ,  Bernhard GSTOETTENBAUER ,  Helmut KOLLMANN ,  Alexander MELZER ,  Alexander ONIC ,  Rainer STUHLBERGER ,  Mathias ZINNOECKER

IPC: H01Q3/36 ,  G01R25/04 ,  G01S7/03 ,  G01S13/88

CPC classification number: H01Q3/36 ,  G01R25/04 ,  G01S7/032 ,  G01S13/88

Abstract: A circuit is described herein. In accordance with one embodiment the circuit includes two or more RF channels, wherein each channel includes an input node, a phase shifter and an output node. Each channel is configured to receive an RF oscillator signal at the input node and to provide an RF output signal at the output node. The circuit further includes an RF combiner circuit that is coupled with the outputs of the RF channels and configured to generate a combined signal representing a combination of the RF output signals, and a monitor circuit that includes a mixer and is configured to receive and down-convert the combined signal using an RF reference signal. Thus a mixer output signal is generated that depends on the phases of the RF output signals.