公开(公告)号：US20240194580A1

公开(公告)日：2024-06-13

申请号：US18521001

申请日：2023-11-28

Applicant: Infineon Technologies AG

Inventor： Susanne Schulte ,  Scott David Wallace ,  Oliver Blank

IPC: H01L23/498 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L23/49822 ,  H01L24/05 ,  H01L24/45 ,  H01L2224/05006 ,  H01L2224/05022 ,  H01L2224/05147 ,  H01L2224/45005 ,  H01L2224/4502 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/13055 ,  H01L2924/1306

Abstract: A power semiconductor device includes a semiconductor substrate. A signal routing structure is disposed above the semiconductor substrate. The signal routing structure comprises a specific metal. A solderable power pad forms a power terminal of the power semiconductor device. The solderable power pad comprises the specific metal. An electrically insulating dielectric passivation layer is disposed between the solderable power pad and the signal routing structure.