公开(公告)号：US20160077392A1

公开(公告)日：2016-03-17

申请号：US14831865

申请日：2015-08-20

Applicant: Innolux Corporation

Inventor： Jian-Min LEU ,  Yueh-Ting CHUNG ,  Ming-Yo CHIANG

IPC: G02F1/1343

CPC classification number: G02F1/1343 ,  G02F1/134363 ,  G02F2201/123

Abstract: A display panel including a first substrate and a second substrate disposed is provided. The first substrate includes a first data line, a second data line, and a third data line parallel with one another, and a first scan line and a second scan line parallel with each other. The first scan line, the second scan line, the first data line and the second data line define a first sub-pixel. The first scan line, the second scan line, the second data line and the third data line define a second sub-pixel. The first sub-pixel includes a first pixel electrode. The second sub-pixel includes a second pixel electrode. A first interval between the first pixel electrode and the second data line is larger than a second interval between the second pixel electrode and the second data line.

Abstract translation: 提供了包括第一基板和设置的第二基板的显示面板。 第一基板包括彼此平行的第一数据线，第二数据线和第三数据线，以及彼此平行的第一扫描线和第二扫描线。 第一扫描线，第二扫描线，第一数据线和第二数据线限定第一子像素。 第一扫描线，第二扫描线，第二数据线和第三数据线限定第二子像素。 第一子像素包括第一像素电极。 第二子像素包括第二像素电极。 第一像素电极和第二数据线之间的第一间隔大于第二像素电极与第二数据线之间的第二间隔。

公开(公告)号：US20150205176A1

公开(公告)日：2015-07-23

申请号：US14598566

申请日：2015-01-16

Applicant: Innolux Corporation

Inventor： Yung-Hsin LU ,  Cheng-Min WU ,  Ming-Yo CHIANG ,  Jyun-Yu CHEN

IPC: G02F1/1362 ,  G02F1/1368

CPC classification number: G02F1/136209 ,  G02F2001/13685

Abstract: A display panel comprising a substrate, a plurality of gate lines, source lines, semiconductor layers and light shielding layers is provided. The gate lines are disposed on the substrate in parallel. The source lines are disposed on the substrate in parallel. The gate lines and the source lines are intercrossed to define a plurality of pixel areas. The semiconductor layers are disposed on the corresponding pixel areas, and each semiconductor layer includes at least one channel region overlapping each gate line. The slight shielding layers are located between the channel regions and the substrate. In a normal direction of the substrate, one of the gate lines is overlapped by two of the light shielding layers, and one of the light shielding layers overlaps even number of the source lines.

Abstract translation: 提供了包括基板，多条栅极线，源极线，半导体层和遮光层的显示面板。 栅极线平行地设置在基板上。 源极线平行地设置在基板上。 栅极线和源极线交叉以限定多个像素区域。 半导体层设置在相应的像素区域上，并且每个半导体层包括与每个栅极线重叠的至少一个沟道区域。 轻微的屏蔽层位于沟道区域和衬底之间。 在基板的法线方向上，其中一条栅极线被两个遮光层重叠，其中一个遮光层与源极线偶数重叠。