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公开(公告)号:US11599285B2
公开(公告)日:2023-03-07
申请号:US17321189
申请日:2021-05-14
发明人: Jon C. R. Bennett
摘要: A data memory system is described, where there may be an asymmetry in the time needed to write or erase data and the time needed to read data. The data may be stored using a RAID data storage arrangement and the reading, writing and erasing operations on the modules arranged such that the erasing and writing operations may be performed without significant latency for performing a read operation. Where a failure of a memory module in the memory system occurs, methods for recovering the data of the failed module are disclosed which may selected in accordance with policies that may relate to the minimizing the possibility of irretrievable data loss, or degradation of latency performance.
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公开(公告)号:US11960743B2
公开(公告)日:2024-04-16
申请号:US18178629
申请日:2023-03-06
发明人: Jon C. R. Bennett
CPC分类号: G06F3/064 , G06F3/0619 , G06F3/0689 , G06F11/1068 , G06F11/108 , G11B20/1833 , G11C29/52 , G06F3/0611 , G06F3/0659 , G06F12/0246 , G11B2220/60 , G11C7/1072
摘要: A data memory system is described, where there may be an asymmetry in the time needed to write or erase data and the time needed to read data. The data may be stored using a RAID data storage arrangement and the reading, writing and erasing operations on the modules arranged such that the erasing and writing operations may be performed without significant latency for performing a read operation. Where a failure of a memory module in the memory system occurs, methods for recovering the data of the failed module are disclosed which may selected in accordance with policies that may relate to the minimizing the possibility of irretrievable data loss, or degradation of latency performance.
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