Methods and systems for analog-to-digital conversion (ADC) using an ultra small capacitor array with full range and sub-range modes
    1.
    发明授权
    Methods and systems for analog-to-digital conversion (ADC) using an ultra small capacitor array with full range and sub-range modes 有权
    使用具有全范围和子范围模式的超小电容阵列进行模数转换(ADC)的方法和系统

    公开(公告)号:US09553602B1

    公开(公告)日:2017-01-24

    申请号:US15076327

    申请日:2016-03-21

    CPC classification number: H03M1/12 H03M1/0617 H03M1/146 H03M1/468

    Abstract: Methods and apparatuses are described to convert analog signals to digital signals using a local charge averaging capacitor array (LCACA) in an analog-to-digital converter (ADC.) An apparatus includes a comparator. The comparator is configured with a first high input, a first low input, and is configure to receive a clock signal. A logic/latch block is configured to receive the clock signal and an output from the comparator. The logic/latch block is configured to output a control signal and a digital N-bit output signal. A local charge-averaging capacitor array (LCACA) is configured to receive the control signal and a reference voltage. An output of the LCACA is coupled to the first low input. The first LCACA is divided into a high sub-array and a low sub-array. The high sub-array is pre-charged to a high reference voltage and the low sub-array is pre-charged to a low reference voltage. The high reference voltage is greater than the low reference voltage. In operation, an analog signal is input to the first high input and the digital N-bit output signal is the digital conversion of the analog signal.

    Abstract translation: 描述了使用模数转换器(ADC)中的局部电荷平均电容器阵列(LCACA)将模拟信号转换成数字信号的方法和装置。一种装置包括比较器。 比较器配置有第一高输入,第一低输入,并且被配置为接收时钟信号。 逻辑/锁存块配置为接收时钟信号和比较器的输出。 逻辑/锁存块被配置为输出控制信号和数字N位输出信号。 局部充电平均电容器阵列(LCACA)被配置为接收控制信号和参考电压。 LCACA的输出耦合到第一个低输入。 第一个LCACA分为高子阵列和低子阵列。 高子阵列预充电到高参考电压,低子阵列预充电到低参考电压。 高参考电压大于低参考电压。 在操作中,模拟信号被输入到第一高输入端,数字N位输出信号是模拟信号的数字转换。

Patent Agency Ranking