公开(公告)号：US09479177B1

公开(公告)日：2016-10-25

申请号：US14575212

申请日：2014-12-18

Applicant: Integrated Device Technology, Inc.

Inventor： Brian Buell ,  Li Tao ,  Song Gao

IPC: H03K23/00 ,  H03K21/02 ,  H03L7/18 ,  H03L7/197 ,  H03L7/193 ,  H03K23/68

CPC classification number: H03L7/0992 ,  H03K21/02 ,  H03K23/68 ,  H03L7/0802 ,  H03L7/085 ,  H03L7/093 ,  H03L7/18 ,  H03L7/1806 ,  H03L7/193 ,  H03L7/1974 ,  H03L7/1976 ,  H03L2207/50

Abstract: A fractional divider (FD) includes a multi-modulus divider (MMD), which generates a periodic output signal in response to: (i) a periodic reference signal (REFHF), and (ii) a modulus control signal having a value that sets a frequency division ratio (1/P, 1/(P+1)) to be applied to the periodic reference signal. A phase correction circuit is provided, which generates an FD output signal in response to the periodic MMD output signal and a corrected multi-bit phase correction control (CPCC) signal during an active mode of operation. The phase correction circuit further generates an FD output signal in response to the periodic MMD output signal and a preliminary multi-bit phase correction control (PPCC) signal during a calibration mode of operation. A control circuit is provided, which generates the modulus control signal, the PPCC signal and the CPCC signal during the active mode of operation.

Abstract translation: 分数分频器（FD）包括多模式分频器（MMD），其响应于：（i）周期性参考信号（REFHF）产生周期性输出信号，以及（ii）具有设定值的模数控制信号 要施加到周期性参考信号的分频比（1 / P，1 /（P + 1））。 提供相位校正电路，其在活动操作模式期间响应于周期性MMD输出信号和校正的多位相位校正控制（CPCC）信号而产生FD输出信号。 相位校正电路还在校准操作模式期间响应周期性MMD输出信号和初步多位相位校正控制（PPCC）信号产生FD输出信号。 提供了一种控制电路，其在活动操作模式期间产生模数控制信号，PPCC信号和CPCC信号。