公开(公告)号：US20160321187A1

公开(公告)日：2016-11-03

申请号：US14701911

申请日：2015-05-01

Applicant: Intel Corporation

Inventor： FRANCESC GUIM BERNAT ,  ALEJANDRO DURAN GONZALEZ

IPC: G06F12/10 ,  G06F12/12 ,  G06F12/08

CPC classification number: G06F12/1018 ,  G06F12/0864 ,  G06F12/12 ,  G06F2212/502 ,  G06F2212/69

Abstract: Data and a memory address associated with the data may be received. A hash value of the memory address may be calculated by using a first hash function. The data may be stored at a cache set of a plurality of cache sets of a cache memory based on the hash value calculated from the first hash function. A determination may be made as to whether the storing of the data at the cache set of the plurality of cache sets of the cache memory is associated with a conflict ratio of the cache memory exceeding a threshold ratio. In response to the conflict ratio exceeding the threshold ratio, a second hash value of a second memory address associated with a second data may be calculated by using a second hash function that is different than the first hash function.

Abstract translation: 可以接收与数据相关联的数据和存储器地址。 可以通过使用第一散列函数来计算存储器地址的散列值。 数据可以基于从第一散列函数计算的散列值存储在高速缓冲存储器的多个高速缓存组的高速缓存组中。 可以确定高速缓冲存储器的多个高速缓存组中的高速缓存组中的数据的存储是否与高速缓冲存储器的冲突比超过阈值比率相关联。 响应于冲突比超过阈值比率，可以通过使用与第一散列函数不同的第二散列函数来计算与第二数据相关联的第二存储器地址的第二散列值。