公开(公告)号：US20220196732A1

公开(公告)日：2022-06-23

申请号：US17131604

申请日：2020-12-22

Applicant: Intel Corporation

Inventor： Todd R. COONS ,  Michael RUTIGLIANO ,  Joe F. WALCZYK ,  Abram M. DETOFSKY

IPC: G01R31/308 ,  G02B6/42

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to active optical plugs used to cover optical connectors of a photonics package to protect the connectors. The active optical plugs may also be used to perform testing of the photonics package, including generating light to be sent to the photonics package and to detect light received from the photonics package as part of the test protocol. This allows testing the optical connection and the photonics package, without exposing the optical connections of the package to damage from dust or physical contact. Other embodiments may be described and/or claimed.

公开(公告)号：US20220196915A1

公开(公告)日：2022-06-23

申请号：US17132912

申请日：2020-12-23

Applicant: Intel Corporation

Inventor： Todd R. COONS ,  Michael RUTIGLIANO ,  Joe F. WALCZYK ,  Abram M. DETOFSKY

IPC: G02B6/12 ,  H01L33/62 ,  H01L33/58 ,  H04B10/40 ,  H01L25/075

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to incorporating photonics integrated circuitry into a base die, the base die including an optical interconnect at a bottom of the base die to transmit and to receive light signals from outside the base die. The top of the base die includes one or more electrical connectors that are electrically coupled with the photonics integrated circuitry. The base die may be referred to as the photonics die. A system-on-a-chip (SOC) may be electrically coupled with and stacked onto the top of the photonics die. Other embodiments may be described and/or claimed.

公开(公告)号：US20220196924A1

公开(公告)日：2022-06-23

申请号：US17131630

申请日：2020-12-22

Applicant: Intel Corporation

Inventor： Joe F. WALCZYK ,  Todd R. COONS ,  Michael RUTIGLIANO ,  Abram M. DETOFSKY

IPC: G02B6/38

Abstract: A photonic connector comprises a first ferrule having a first plurality of optical fibers. A membrane cover is attached to the first ferrule and covers ends of the first plurality of optical fibers. Once the first ferrule is mated with a second ferrule having a second plurality of optical fibers, the membrane cover is pierced by the first plurality of optical fibers, the second plurality of optical fibers, or both.

公开(公告)号：US20190293707A1

公开(公告)日：2019-09-26

申请号：US16339834

申请日：2017-11-28

Applicant: Intel Corporation

Inventor： Erkan ACAR ,  Abram M. DETOFSKY ,  Jin PAN

IPC: G01R31/28

Abstract: In one embodiment, a device to test one or more electronic components comprises a first card comprising a first test device communicatively coupled to at least a first connector assembly positioned on the first card and a second card comprising a second test device communicatively coupled to at least a second connector assembly positioned on the second card. The at least a first connector assembly is directly communicatively coupled to the at least a second connector assembly to provide a direct communication interface between the first test device and the second test device that is not routed via a backplane. Other embodiments may be described.

公开(公告)号：US20250020874A1

公开(公告)日：2025-01-16

申请号：US18902427

申请日：2024-09-30

Applicant: Intel Corporation

Inventor： Todd R. COONS ,  Michael RUTIGLIANO ,  Joe F. WALCZYK ,  Abram M. DETOFSKY

IPC: G02B6/42 ,  G02B6/12 ,  G02B6/30 ,  G02B6/34 ,  H01L23/367 ,  H01L25/075 ,  H01L33/58 ,  H01L33/62 ,  H04B10/40

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to incorporating photonics integrated circuitry into a base die, the base die including an optical interconnect at a bottom of the base die to transmit and to receive light signals from outside the base die. The top of the base die includes one or more electrical connectors that are electrically coupled with the photonics integrated circuitry. The base die may be referred to as the photonics die. A system-on-a-chip (SOC) may be electrically coupled with and stacked onto the top of the photonics die. Other embodiments may be described and/or claimed.