公开(公告)号：US20240153837A1

公开(公告)日：2024-05-09

申请号：US17983226

申请日：2022-11-08

申请人： Intel Corporation

发明人： Ziyin LIN ,  Vipul MEHTA ,  Jonas CROISSANT ,  Jigneshkumar PATEL ,  Dingying XU ,  Gang DUAN ,  Aditya Sumanth YERRAMILLI ,  Suriyakala RAMALINGAM ,  Xavier BRUN

IPC分类号： H01L23/31 ,  H01L23/498 ,  H01L25/18

CPC分类号： H01L23/3157 ,  H01L23/49811 ,  H01L25/18 ,  H01L24/32 ,  H01L2224/32225

摘要： Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a die, and an array of pillars adjacent to the die. In an embodiment, the electronic package further comprises an underfill under the die, where an edge of the underfill is between an inner column of pillars in the array of pillars and an outer edge of the die, and where the edge of the underfill has a height that is less than a maximum height of the underfill.