公开(公告)号：US20210035859A1

公开(公告)日：2021-02-04

申请号：US16526012

申请日：2019-07-30

Applicant: Intel Corporation

Inventor： Vipul MEHTA ,  Yiqun BAI ,  Ziyin LIN ,  John DECKER ,  Yan LI

IPC: H01L21/768 ,  H01L21/56 ,  H01L23/31 ,  H01L23/367 ,  H01L23/373

Abstract: Embodiments disclosed herein include composite dies and methods of forming such composite dies. In an embodiment, a composite die comprises a base substrate, a first die over the base substrate, and a second die over the base substrate and adjacent to the first die. In an embodiment an underfill layer is between the first die and the base substrate, between the second die and the base substrate, and between the first die and the second die. In an embodiment, a trench into the underfill layer is between the first die and the second die. In an embodiment the composite die further comprises, a mold layer over the first die and the second die, wherein the mold layer fills the trench.

公开(公告)号：US20220165585A1

公开(公告)日：2022-05-26

申请号：US17669288

申请日：2022-02-10

Applicant: Intel Corporation

Inventor： Ziyin LIN ,  Vipul MEHTA ,  Edvin CETEGEN ,  Yuying WEI ,  Sushrutha GUJJULA ,  Nisha ANANTHAKRISHNAN ,  Shan ZHONG

IPC: H01L21/56 ,  H01L21/67 ,  H01L23/00 ,  H01L23/31 ,  H01L23/13

Abstract: A substrate protrusion is described. The substrate protrusion includes a top portion that extends in a first direction toward a gap between the first die and the second die and in a second direction parallel to the gap between the first die and the second die. The substrate protrusion also includes a base portion that is coupled to a substrate that extends underneath the first die and the second die.

公开(公告)号：US20210066152A1

公开(公告)日：2021-03-04

申请号：US16557891

申请日：2019-08-30

Applicant: Intel Corporation

Inventor： Ziyin LIN ,  Elizabeth NOFEN ,  Vipul MEHTA ,  Taylor GAINES

IPC: H01L23/31 ,  H01L21/56 ,  H01L21/67 ,  H01L23/373 ,  H01L23/367

Abstract: A device is disclosed. The device includes a first die, a plurality of chiplets above the first die, a first underfill material beneath the chiplets, and a gap fill material between the chiplets. The gap fill material is different from the first underfill material. An interface region is formed between the first underfill material and the gap fill material

公开(公告)号：US20240402445A1

公开(公告)日：2024-12-05

申请号：US18798574

申请日：2024-08-08

Applicant: Intel Corporation

Inventor： Bassam ZIADEH ,  Jingyi HUANG ,  Yiqun BAI ,  Ziyin LIN ,  Vipul MEHTA ,  Joseph VAN NAUSDLE

IPC: G02B6/42

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to hydrophobic features to block or slow the spread of epoxy. These hydrophobic features are placed either on a die surface or on a substrate surface to control epoxy spread between the die in the substrate to prevent formation of fillets. Packages with these hydrophobic features may include a substrate, a die with a first side and a second side opposite the first side, the second side of the die physically coupled with a surface of the substrate, and a hydrophobic feature coupled with the second side of the die or the surface of the substrate to reduce a flow of epoxy on the substrate or die. In embodiments, these hydrophobic features may include a chemical barrier or a laser ablated area on the substrate or die. Other embodiments may be described and/or claimed.

公开(公告)号：US20240186279A1

公开(公告)日：2024-06-06

申请号：US18060577

申请日：2022-12-01

Applicant: Intel Corporation

Inventor： Minglu LIU ,  Yosuke KANAOKA ,  Jung Kyu HAN ,  Gang DUAN ,  Ziyin LIN

IPC: H01L23/00 ,  B32B37/12

CPC classification number: H01L24/75 ,  B32B37/12 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/32225 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/7531 ,  H01L2224/83191 ,  H01L2224/83193 ,  H01L2224/83874 ,  H01L2924/0635 ,  H01L2924/0665 ,  H01L2924/069 ,  H01L2924/0715

Abstract: The present disclosure relates to a system. The system may include a stage configured to support a substrate. The system may also include a bondhead configured to press a device against the substrate. The system may further include a light source configured to emit UV light towards the stage.

公开(公告)号：US20190304808A1

公开(公告)日：2019-10-03

申请号：US15942109

申请日：2018-03-30

Applicant: Intel Corporation

Inventor： Ziyin LIN ,  Vipul MEHTA ,  Edvin CETEGEN ,  Yuying WEI ,  Sushrutha GUJJULA ,  Nisha ANANTHAKRISHNAN ,  Shan ZHONG

IPC: H01L21/56 ,  H01L21/67 ,  H01L23/13 ,  H01L23/31 ,  H01L23/00

Abstract: A substrate protrusion is described. The substrate protrusion includes a top portion that extends in a first direction toward a gap between the first die and the second die and in a second direction parallel to the gap between the first die and the second die. The substrate protrusion also includes a base portion that is coupled to a substrate that extends underneath the first die and the second die.

公开(公告)号：US20250106983A1

公开(公告)日：2025-03-27

申请号：US18373457

申请日：2023-09-27

Applicant: Intel Corporation

Inventor： Bohan SHAN ,  Kyle ARRINGTON ,  Dingying David XU ,  Ziyin LIN ,  Timothy GOSSELIN ,  Elah BOZORG-GRAYELI ,  Aravindha ANTONISWAMY ,  Wei LI ,  Haobo CHEN ,  Yiqun BAI ,  Jose WAIMIN ,  Ryan CARRAZZONE ,  Hongxia FENG ,  Srinivas Venkata Ramanuja PIETAMBARAM ,  Gang DUAN ,  Bin MU ,  Mohit GUPTA ,  Jeremy D. ECTON ,  Brandon C. MARIN ,  Xiaoying GUO ,  Ashay DANI

IPC: H05K1/02 ,  H05K1/03

Abstract: Embodiments disclosed herein include glass core package substrates with a stiffener. In an embodiment, an apparatus comprises a substrate with a first layer with a first width, where the first layer is a glass layer, a second layer under the first layer, where the second layer has a second width that is smaller than the first width, and a third layer over the first layer, where the third layer has a third width that is smaller than the first width. In an embodiment, the apparatus further comprises a metallic structure with a first portion and a second portion, where the first portion is over a top surface of the substrate and the second portion extends away from the first portion and covers at least a sidewall of the first layer.

公开(公告)号：US20240332125A1

公开(公告)日：2024-10-03

申请号：US18128848

申请日：2023-03-30

Applicant: Intel Corporation

Inventor： Kyle ARRINGTON ,  Clay ARRINGTON ,  Bohan SHAN ,  Haobo CHEN ,  Srinivas V. PIETAMBARAM ,  Gang DUAN ,  Ziyin LIN ,  Hongxia FENG ,  Yiqun BAI ,  Xiaoying GUO ,  Dingying XU ,  Bai NIE

IPC: H01L23/373 ,  H01L21/48 ,  H01L23/24 ,  H01L23/498

CPC classification number: H01L23/3737 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/24 ,  H01L23/49822 ,  H01L23/49827

Abstract: Embodiments disclosed herein include a package substrate. In an embodiment, the package substrate comprises a first layer and a second layer over the first layer. In an embodiment, the second layer comprises a dielectric material including sulfur. In an embodiment, fillers are within the second layer. In an embodiment, the fillers have a volume fraction that is less than approximately 0.2.

公开(公告)号：US20240153837A1

公开(公告)日：2024-05-09

申请号：US17983226

申请日：2022-11-08

Applicant: Intel Corporation

Inventor： Ziyin LIN ,  Vipul MEHTA ,  Jonas CROISSANT ,  Jigneshkumar PATEL ,  Dingying XU ,  Gang DUAN ,  Aditya Sumanth YERRAMILLI ,  Suriyakala RAMALINGAM ,  Xavier BRUN

IPC: H01L23/31 ,  H01L23/498 ,  H01L25/18

CPC classification number: H01L23/3157 ,  H01L23/49811 ,  H01L25/18 ,  H01L24/32 ,  H01L2224/32225

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a die, and an array of pillars adjacent to the die. In an embodiment, the electronic package further comprises an underfill under the die, where an edge of the underfill is between an inner column of pillars in the array of pillars and an outer edge of the die, and where the edge of the underfill has a height that is less than a maximum height of the underfill.

公开(公告)号：US20200005983A1

公开(公告)日：2020-01-02

申请号：US16024718

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Malavarayan SANKARASUBRAMANIAN ,  Yongki MIN ,  Anne AUGUSTINE ,  Kaladhar RADHAKRISHNAN ,  Taylor GAINES ,  Ziyin LIN

IPC: H01F27/02 ,  H01F1/42 ,  H01F41/00 ,  H01F1/01 ,  H01L25/16 ,  H01L21/48 ,  H01F27/29

Abstract: Embodiments herein relate to a magnetic encapsulant composite, comprising a mixture of a first material that is a soft magnetic filler, a second material that is a polymer matrix, and a third material that is a process ingredient. The magnetic encapsulant composite may then encapsulate or partially encapsulate a magnetic inductor coupled to a substrate to increase the inductance of the magnetic inductor and/or to strengthen the substrate to which the magnetic inductor and the composite are coupled.