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公开(公告)号:US20190042352A1
公开(公告)日:2019-02-07
申请号:US16012294
申请日:2018-06-19
Applicant: Intel Corporation
Inventor: Jason Casmira , Jawad Khan , Ambika Krishnamoorthy , Adrian Pearson
Abstract: Systems, apparatuses and methods may provide for technology to conduct, by a storage device, a state analysis of the storage device based on an assert log associated with a failure condition in the storage device. The technology may also return, by the storage device, the storage device to service if the state analysis indicates that the storage device is operable. Additionally, the technology may remove, by the storage device, the storage device from service if the state analysis indicates that the storage device is inoperable.
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公开(公告)号:US11816039B2
公开(公告)日:2023-11-14
申请号:US17441214
申请日:2019-04-19
Applicant: Intel Corporation
Inventor: Adrian Pearson , Bing Zhu , Elena Agranovsky , Tomas Winkler , Yang Huang
IPC: G06F12/14
CPC classification number: G06F12/1408 , G06F12/1425 , G06F12/1466
Abstract: Multi-mode protected memory in accordance with the present description includes a permanent mode and a transient mode of operation. In one embodiment of the permanent mode, an authentication key is programmable once and a write counter is not decrementable or resettable. In one embodiment of the transient mode, an authentication key may be programmed many times and a write counter may be reset many times. Other features and advantages may be realized, depending upon the particular application.
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公开(公告)号:US20180189508A1
公开(公告)日:2018-07-05
申请号:US15394958
申请日:2016-12-30
Applicant: Intel Corporation
Inventor: Xiaoning Li , Ravi L. Sahita , Benjamin W. Boyer , Sanjeev Trika , Adrian Pearson
CPC classification number: G06F21/6218 , G06F3/062 , G06F3/0659 , G06F3/0665 , G06F3/0673 , G06F21/52 , G06F21/78
Abstract: In one embodiment, a system comprises a processor to, in response to a determination that a write command is suspect, identify a logical address associated with the write command; and send a checkpoint command identifying the logical address to a storage device to preserve data stored in the storage device at a physical address associated with the logical address.
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公开(公告)号:US20230123174A1
公开(公告)日:2023-04-20
申请号:US17973990
申请日:2022-10-26
Applicant: Intel Corporation
Inventor: Mahesh Natu , Adrian Pearson
Abstract: Examples disclosed herein include are computing device hardware components, computing devices, systems, machine-readable mediums, and interconnect protocols that provide for code object measurement of a peripheral device and a method for accessing the measurements to verify integrity across a computing interconnect (e.g., Peripheral Component Interconnect Express - PCIe). For example, a cryptographic processor of a PCIe endpoint (such as a peripheral) may take a measurement (e.g., computing a hash value) of a code object on the device prior to executing the code object. This measurement may be placed in a register that is accessible to another component, such as a host operating system across a PCIe bus for interrogation. The host operating system may utilize an interconnect protocol, such as a PCIe protocol to access the measurement. These measurements may be consumed by a Trusted Platform Manager or other components of a host system that may verify the measurements.
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公开(公告)号:US11522679B2
公开(公告)日:2022-12-06
申请号:US15836225
申请日:2017-12-08
Applicant: Intel Corporation
Inventor: Mahesh Natu , Adrian Pearson
Abstract: Examples disclosed herein include are computing device hardware components, computing devices, systems, machine-readable mediums, and interconnect protocols that provide for code object measurement of a peripheral device and a method for accessing the measurements to verify integrity across a computing interconnect (e.g., Peripheral Component Interconnect Express—PCIe). For example, a cryptographic processor of a PCIe endpoint (such as a peripheral) may take a measurement (e.g., computing a hash value) of a code object on the device prior to executing the code object. This measurement may be placed in a register that is accessible to another component, such as a host operating system across a PCIe bus for interrogation. The host operating system may utilize an interconnect protocol, such as a PCIe protocol to access the measurement. These measurements may be consumed by a Trusted Platform Manager or other components of a host system that may verify the measurements.
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公开(公告)号:US10325108B2
公开(公告)日:2019-06-18
申请号:US15394958
申请日:2016-12-30
Applicant: Intel Corporation
Inventor: Xiaoning Li , Ravi L. Sahita , Benjamin W. Boyer , Sanjeev Trika , Adrian Pearson
Abstract: In one embodiment, a system comprises a processor to, in response to a determination that a write command is suspect, identify a logical address associated with the write command; and send a checkpoint command identifying the logical address to a storage device to preserve data stored in the storage device at a physical address associated with the logical address.
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公开(公告)号:US20190044702A1
公开(公告)日:2019-02-07
申请号:US15836225
申请日:2017-12-08
Applicant: Intel Corporation
Inventor: Mahesh Natu , Adrian Pearson
Abstract: Examples disclosed herein include are computing device hardware components, computing devices, systems, machine-readable mediums, and interconnect protocols that provide for code object measurement of a peripheral device and a method for accessing the measurements to verify integrity across a computing interconnect (e.g., Peripheral Component Interconnect Express—PCIe). For example, a cryptographic processor of a PCIe endpoint (such as a peripheral) may take a measurement (e.g., computing a hash value) of a code object on the device prior to executing the code object. This measurement may be placed in a register that is accessible to another component, such as a host operating system across a PCIe bus for interrogation. The host operating system may utilize an interconnect protocol, such as a PCIe protocol to access the measurement. These measurements may be consumed by a Trusted Platform Manager or other components of a host system that may verify the measurements.
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