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1.
公开(公告)号:US20210149707A1
公开(公告)日:2021-05-20
申请号:US17133194
申请日:2020-12-23
申请人: Intel Corporation
发明人: Akhilesh Thyagaturu , Vinodh Gopal , Tonia Morris
IPC分类号: G06F9/455 , G06F9/38 , G06F9/54 , G06F16/901
摘要: Methods, apparatus, systems, and articles of manufacture to process data packets for logical and virtual switch acceleration in memory are disclosed. An example memory includes an input packet buffer to store an inbound data packet from a network; an output packet buffer to store an outbound data packet to transmitted via the network; and programmable logic to: read the inbound data packet from the input packet buffer; process the inbound data packet to determine the outbound data packet; and output the outbound data packet to the output packet buffer.
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2.
公开(公告)号:US20240364643A1
公开(公告)日:2024-10-31
申请号:US18141154
申请日:2023-04-28
申请人: Intel Corporation
发明人: Sandeep K. Jain , Akhilesh Thyagaturu , Joshua B. Fryman , Poornima Lalwaney , Vinodh Gopal , Brian Paul Johnson
IPC分类号: H04L49/90 , H04L47/32 , H04L49/118
CPC分类号: H04L49/9068 , H04L47/32 , H04L49/118
摘要: Techniques for processing packets on a network interface controller (NIC) with memory chiplets are disclosed. In an illustrative embodiment, a NIC includes a disaggregated memory with several high-bandwidth memory chiplets spread out in various locations on the NIC. The disaggregated nature of the memory can improve latency, throughput, and scalability as well as improve thermal performance by distributing heat generation to different locations on the NIC. In use, ports of the NIC can be configured to identify packets associated with certain flows and direct those packets to queues on the NIC. Direct memory access circuitry can copy the packets from queues on the NIC to queues on the system memory. This chain of copying packets from the port to the system memory creates a kind of virtual circuit, delivering packets directly to applications with low latency.
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公开(公告)号:US20230344804A1
公开(公告)日:2023-10-26
申请号:US18343671
申请日:2023-06-28
申请人: Intel Corporation
IPC分类号: H04L9/40
CPC分类号: H04L63/0421 , H04L63/0428
摘要: Methods, apparatus, systems, and articles of manufacture to migrate cloud-based workloads are disclosed. An example instructions cause programmable circuitry to at least cause transmission of anonymized information corresponding to a user device to a network device; and cause migration of a virtual execution environment from a first compute device to a second compute device based on a response from the network device, the virtual execution environment to execute at least a portion of a workload for an end user device.
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公开(公告)号:US20240126615A1
公开(公告)日:2024-04-18
申请号:US18538364
申请日:2023-12-13
申请人: Intel Corporation
CPC分类号: G06F9/505 , G06F9/5044 , G06F9/5072 , G06F9/5088 , G06F11/3433 , G06F11/3442 , G06F2209/501 , G06F2209/5019 , G06F2209/508
摘要: Embodiments for orchestrating execution of workloads on a distributed computing infrastructure are disclosed herein. In one example, environment data is received for compute devices in a distributed computing infrastructure. The environment data is indicative of an operating environment of the respective compute devices and a physical environment of the respective locations of the compute devices. Future operating conditions of the compute devices are predicted based on the environment data, and workloads are orchestrated for execution on the distributed computing infrastructure based on the predicted future operating conditions.
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公开(公告)号:US20240020428A1
公开(公告)日:2024-01-18
申请号:US18476026
申请日:2023-09-27
申请人: Intel Corporation
CPC分类号: G06F21/85 , G06F21/71 , G06F21/577 , G06F2221/034
摘要: Systems, apparatus, articles of manufacture, and methods are disclosed to generate and manage a firewall policy. An example includes interface circuitry, machine readable instructions, and programmable circuitry to at least one of instantiate or execute the machine readable instructions to determine whether an operation is allowed to pass between a first component on a system-on-chip (SoC) and a second component on the SoC, detect an interconnect between the first component on the SoC and the second component on the SoC, cause the interconnect to filter the operation based on the determination of whether the operation is allowed to pass between the first component and the second component, and transmit a request to filter the operation based on the determination of whether the operation is allowed to pass between the first component and the second component.
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公开(公告)号:US20230247486A1
公开(公告)日:2023-08-03
申请号:US18130695
申请日:2023-04-04
申请人: Intel Corporation
摘要: Dynamic resource reconfiguration based on workload semantics and behavior. A controller may receive, from a core network, a request for an end-to-end managed connection, the end-to-end managed connection for an application executing on a server and an application executing on a client device, where the client device is coupled to the controller via a radio access network (RAN). The controller may determine a policy for the end-to-end managed connection. The controller may apply one or more parameters of the policy to the end-to-end managed connection.
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