公开(公告)号：US20240296605A1

公开(公告)日：2024-09-05

申请号：US18566218

申请日：2021-11-03

Applicant: Intel Corporation

Inventor： Dmitry Kozlov ,  Aleksei Chernigin ,  Dmitry Tarakanov

IPC: G06T11/40 ,  G06T3/4046

CPC classification number: G06T11/40 ,  G06T3/4046 ,  G06T2210/52

Abstract: One embodiment provides a graphics processor comprising a set of processing resources configured to perform a supersampling anti-aliasing operation via a mixed precision convolutional neural network. The set of processing resources include circuitry configured to receive, at an input block of a neural network model, a set of data including previous frame data, current frame data, jitter offset data, and velocity data, pre-process the set of data to generate pre-processed data, provide pre-processed data to a feature extraction network of the neural network model and an output block of the neural network model, process the first pre-processed data at the feature extraction network via one or more encoder stages and one or more decoder stages, output tensor data from the feature extraction network to the output block, and generate an anti-aliased output frame via the output block based on the current frame data and the tensor data output from the feature extraction network.

公开(公告)号：US20230146005A1

公开(公告)日：2023-05-11

申请号：US17558167

申请日：2021-12-21

Applicant: Intel Corporation

Inventor： Aleksei Chernigin ,  Dmitry Kozlov ,  Dmitry Tarakanov ,  Anton Kaplanyan

IPC: G06T11/40 ,  G06T1/20 ,  G06T7/90 ,  G06T7/50 ,  G06K9/62 ,  G06V10/75 ,  G06V10/82 ,  G06N3/04

CPC classification number: G06T11/40 ,  G06T1/20 ,  G06T7/90 ,  G06T7/50 ,  G06K9/6256 ,  G06K9/6262 ,  G06V10/751 ,  G06V10/82 ,  G06N3/04 ,  G06T2207/10024 ,  G06T2207/20081 ,  G06T2207/20084 ,  G06T2207/20216 ,  G06T2200/12

Abstract: An apparatus to facilitate augmenting temporal anti-aliasing with a neural network for history validation is disclosed. The apparatus includes a set of processing resources configured to perform augmented temporal anti-aliasing (TAA), the set of processing resources including circuitry configured to: receive, at a history validation neural network, inputs for a current pixel of a current frame and a reprojected pixel corresponding to the current pixel, the reprojected pixel originating from history data of the current frame; generate, using an output of the history validation neural network, a validated color for the current pixel based on current color data corresponding to the current pixel and history color data corresponding to the reprojected pixel; render an output frame using the validated color; and add the output frame to the history data.

公开(公告)号：US20240119558A1

公开(公告)日：2024-04-11

申请号：US18528292

申请日：2023-12-04

Applicant: Intel Corporation

Inventor： Dmitry Kozlov ,  Aleksei Chernigin ,  Dmitry Tarakanov

IPC: G06T3/4046 ,  G06N3/04 ,  G06N3/098 ,  G06T1/20 ,  G06T3/4053 ,  G06T11/00 ,  G06T11/20

CPC classification number: G06T3/4046 ,  G06N3/04 ,  G06N3/098 ,  G06T1/20 ,  G06T3/4053 ,  G06T11/001 ,  G06T11/203 ,  G06T2210/52

Abstract: One embodiment provides a graphics processor comprising a set of processing resources configured to perform a supersampling anti-aliasing operation via a mixed precision convolutional neural network. The set of processing resources include circuitry configured to receive, at an input block of a neural network model, a set of data including previous frame data, current frame data, jitter offset data, and velocity data, pre-process the set of data to generate pre-processed data, provide pre-processed data to a feature extraction network of the neural network model and an output block of the neural network model, process the first pre-processed data at the feature extraction network via one or more encoder stages and one or more decoder stages, output tensor data from the feature extraction network to the output block, and generate an anti-aliased output frame via the output block based on the current frame data and the tensor data output from the feature extraction network.