公开(公告)号：US09584164B1

公开(公告)日：2017-02-28

申请号：US15049616

申请日：2016-02-22

Applicant: Intel Corporation

Inventor： Farhana Sheikh ,  Amy L. Whitcombe ,  Erkan Alpman ,  Yanjie Wang ,  Shreyas Sen

IPC: H04B1/00 ,  H04B1/10 ,  H04L27/00

CPC classification number: H04B1/0042 ,  H04B1/10 ,  H04L27/0002

Abstract: A mixer-first receiver operates to generate filtering and analog-to-digital conversion concurrently and adaptively, while removing an LNA before a mixer to enable integration with digital baseband circuits. A plurality of switching capacitor arrays are integrated with a hybrid analog-to-digital filtering component. Switching capacitor arrays of the plurality of switching capacitor arrays can be selectively modified to perform both the filtering operation and the conversion operation together. The same switch capacitors of a switching capacitor array can be utilized in one phase of a clock cycle for the filtering and in another phase of the clock cycle for the conversion.

Abstract translation: 混频器第一接收机用于同时和自适应地产生滤波和模数转换，同时在混频器之前去除LNA以实现与数字基带电路的集成。 多个开关电容器阵列与混合模数转换组件集成。 可以选择性地修改多个开关电容器阵列的开关电容器阵列以一起执行滤波操作和转换操作。 开关电容器阵列的相同开关电容器可以在用于滤波的时钟周期的一个阶段中用于转换的时钟周期的另一个阶段。