公开(公告)号：US09785604B2

公开(公告)日：2017-10-10

申请号：US13767881

申请日：2013-02-15

Applicant: Intel Corporation

Inventor： Ivan Herrera Mejia ,  Manuel A. Aguilar Arreola ,  Shrinivas Venkatraman ,  Andrea R. Vavra ,  Pavel Konev

IPC: G06F13/00 ,  G06F13/42 ,  G06F9/44 ,  G06F13/40 ,  G06F13/38

CPC classification number: G06F13/4282 ,  G06F9/4411 ,  G06F13/385 ,  G06F13/4072 ,  G06F2213/0026

Abstract: Methods and apparatus for utilization of preset evaluation to improve input/output performance in high-speed serial interconnects are described. In some embodiments, performance of a link is evaluated at a plurality of equalization values and one of the plurality of equalization values is selected for the link based on comparison of a plurality of margin values that are to be determined for each of the plurality of equalization values. Other embodiments are also claimed and/or disclosed.