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公开(公告)号：US20250005891A1
公开(公告)日：2025-01-02
申请号：US18343255
申请日：2023-06-28
Applicant: Intel Corporation
IPC: G06V10/60 , G06T5/00 , G06V10/25 , G09G3/3208
Abstract: Various embodiments herein provide apparatuses, systems, and methods associated with a region-based power saving scheme for a display, such as an organic light-emitting diode (OLED) display. In embodiments, pixels of an image may be allocated to two or more subsets including a first subset that corresponds to a region of interest (ROI). The two or more subsets may further include a second subset that includes some or all of the pixels that are outside of the ROI. A more aggressive power saving scheme may be applied to the second subset compared with the first subset (which may or may not undergo a power saving scheme). In some embodiments, a saturation level of the pixels of the second subset may be increased in addition to the dimming. Other embodiments may be described and claimed.
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2.发明公开公开(公告)号：US20240355306A1
公开(公告)日：2024-10-24
申请号：US18753839
申请日：2024-06-25
Applicant: Intel Corporation
Inventor： Krishna Nidamanuri , Arvind Tomar , Bharatkumar Mahajan , Perazhi Sameer Kalathil , Nausheen Ansari , Arthur Runyan
CPC classification number: G09G5/006 , G06F1/10 , G06F3/14 , G09G2320/0257 , G09G2330/023 , G09G2340/0435
Abstract: Systems, apparatus, articles of manufacture, and methods are disclosed to reduce dynamic refresh rate power consumption. An example apparatus includes interface circuitry, machine-readable instructions, and at least one processor circuit to be programmed by the machine-readable instructions to modify a value of a source clock based on a detected application type, generate a pixel clock value change request based on the application type, cause transmission of the pixel clock value change request to a display, and cause transmission of pixels to the display at the modified source clock value.
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