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公开(公告)号:US10831628B2
公开(公告)日:2020-11-10
申请号:US16218078
申请日:2018-12-12
Applicant: Intel Corporation
Inventor: Umberto Santoni , Rahul Pal , Philip Abraham , Mahesh Mamidipaka , C Santhosh
IPC: G06F11/273 , G06F11/16 , G06F11/10
Abstract: A method to check for redundancy in two or more data lines comprises receiving data on a first data line, computing a first cyclic redundancy check (CRC) value on the data of the first data line, performing an exclusive OR (XOR) function on the first CRC value with a stored memory value, and updating the stored memory value with a result of the XOR function, and repeating on additional data lines until a last line is processed such that an error is indicated if a final stored memory value is not zero. An apparatus to check that two cores are operating in lockstep comprises a first core comprising a first data checker, a second core comprising a second data checker, and a lockstep checker to compare an output of the first data checker with an output of the second data checker.