公开(公告)号：US11443073B2

公开(公告)日：2022-09-13

申请号：US16222564

申请日：2018-12-17

Applicant: Intel Corporation

Inventor： Wei Yee Koay ,  Ting Lu ,  Ching Kooi Hor ,  Chin Ghee Ch'ng

IPC: G06F1/08 ,  H03K5/24 ,  H03K3/03 ,  H03K19/17768 ,  G06F21/76

Abstract: An integrated circuit includes a comparator circuit that generates a control signal based on a comparison between a threshold voltage and a supply voltage. The integrated circuit also includes a clock signal generation circuit that generates a clock signal and that receives the control signal. The clock signal generation circuit decreases a frequency of the clock signal to a reduced frequency in response to the control signal indicating that the supply voltage has decreased below the threshold voltage. The integrated circuit also includes a secure device manager circuit that has a timing circuit. The clock signal is provided to a clock input of the timing circuit. The timing circuit receives supply current from the supply voltage. The secure device manager circuit performs a security function for the integrated circuit using the timing circuit in response to the clock signal with the reduced frequency.

公开(公告)号：US20190138754A1

公开(公告)日：2019-05-09

申请号：US16222564

申请日：2018-12-17

Applicant: Intel Corporation

Inventor： Wei Yee Koay ,  Ting Lu ,  Ching Kooi Hor ,  Chin Ghee Ch'ng

IPC: G06F21/76 ,  H03K3/03 ,  H03K5/24 ,  G06F1/08

Abstract: An integrated circuit includes a comparator circuit that generates a control signal based on a comparison between a threshold voltage and a supply voltage. The integrated circuit also includes a clock signal generation circuit that generates a clock signal and that receives the control signal. The clock signal generation circuit decreases a frequency of the clock signal to a reduced frequency in response to the control signal indicating that the supply voltage has decreased below the threshold voltage. The integrated circuit also includes a secure device manager circuit that has a timing circuit. The clock signal is provided to a clock input of the timing circuit. The timing circuit receives supply current from the supply voltage. The secure device manager circuit performs a security function for the integrated circuit using the timing circuit in response to the clock signal with the reduced frequency.