-
1.发明申请公开(公告)号：US20210168000A1
公开(公告)日：2021-06-03
申请号：US17252709
申请日：2018-09-19
Applicant: Intel Corporation
Inventor： Bryan Casper , James Jaussi , Chintan Thakkar , Stefan Shopov
Abstract: A digital transmitter architecture is disclosed to transmit (TX) multi-gigabit per second data signals on single carriers (SC) or orthogonal frequency division multiplexing (OFDM) carriers at millimeter wave frequencies in either one of a high-resolution modulation mode or a spectral shaping mode. The architecture includes a number of digital power amplifier (DPA) and modulation reconfigurable circuit segments to process individual bits of a data bit stream in parallel according to a specific circuit configuration corresponding to the selected TX mode using a multiplexer to switch between configurations.
-
公开(公告)号：US12237816B2
公开(公告)日：2025-02-25
申请号：US17405780
申请日：2021-08-18
Applicant: Intel Corporation
Inventor： Kaushik Dasgupta , Chuanzhao Yu , Chintan Thakkar , Saeid Daneshgar , Hyun Yoon , Xi Li , Anandaroop Chakrabarti , Stefan Shopov
Abstract: An on-chip transformer circuit is disclosed. The on-chip transformer circuit comprises a primary winding circuit comprising at least one turn of a primary conductive winding arranged as a first N-sided polygon in a first dielectric layer of a substrate; and a secondary winding circuit comprising at least one turn of a secondary conductive winding arranged as a second N-sided polygon in a second, different, dielectric layer of the substrate. In some embodiments, the primary winding circuit and the secondary winding circuit are arranged to overlap one another at predetermined locations along the primary conductive winding and the secondary conductive winding, wherein the predetermined locations comprise a number of locations less than all locations along the primary conductive winding and the secondary conductive winding.
-
Patent Agency Ranking
公开(公告)号：US11632092B2
公开(公告)日：2023-04-18
申请号：US17315931
申请日：2021-05-10
Applicant: Intel Corporation
Inventor： Kaushik Dasgupta , Chuanzhao Yu , Chintan Thakkar , Saeid Daneshgar , Hyun Yoon , Xi Li , Anandaroop Chakrabarti , Stefan Shopov
Abstract: An on-chip transformer circuit is disclosed. The on-chip transformer circuit comprises a primary winding circuit comprising at least one turn of a primary conductive winding arranged as a first N-sided polygon in a first dielectric layer of a substrate; and a secondary winding circuit comprising at least one turn of a secondary conductive winding arranged as a second N-sided polygon in a second, different, dielectric layer of the substrate. In some embodiments, the primary winding circuit and the secondary winding circuit are arranged to overlap one another at predetermined locations along the primary conductive winding and the secondary conductive winding, wherein the predetermined locations comprise a number of locations less than all locations along the primary conductive winding and the secondary conductive winding.
-
公开(公告)号：US11031918B2
公开(公告)日：2021-06-08
申请号：US16177790
申请日：2018-11-01
Applicant: Intel Corporation
Inventor： Kaushik Dasgupta , Chuanzhao Yu , Chintan Thakkar , Saeid Daneshgar , Hyun Yoon , Xi Li , Anandaroop Chakrabarti , Stefan Shopov
Abstract: An on-chip transformer circuit is disclosed. The on-chip transformer circuit comprises a primary winding circuit comprising at least one turn of a primary conductive winding arranged as a first N-sided polygon in a first dielectric layer of a substrate; and a secondary winding circuit comprising at least one turn of a secondary conductive winding arranged as a second N-sided polygon in a second, different, dielectric layer of the substrate. In some embodiments, the primary winding circuit and the secondary winding circuit are arranged to overlap one another at predetermined locations along the primary conductive winding and the secondary conductive winding, wherein the predetermined locations comprise a number of locations less than all locations along the primary conductive winding and the secondary conductive winding.
-
5.发明授权公开(公告)号：US11483186B2
公开(公告)日：2022-10-25
申请号：US17252709
申请日：2018-09-19
Applicant: Intel Corporation
Inventor： Bryan Casper , James Jaussi , Chintan Thakkar , Stefan Shopov
Abstract: A digital transmitter architecture is disclosed to transmit (TX) multi-gigabit per second data signals on single carriers (SC) or orthogonal frequency division multiplexing (OFDM) carriers at millimeter wave frequencies in either one of a high-resolution modulation mode or a spectral shaping mode. The architecture includes a number of digital power amplifier (DPA) and modulation reconfigurable circuit segments to process individual bits of a data bit stream in parallel according to a specific circuit configuration corresponding to the selected TX mode using a multiplexer to switch between configurations.
-
公开(公告)号：US20220038069A1
公开(公告)日：2022-02-03
申请号：US17405780
申请日：2021-08-18
Applicant: Intel Corporation
Inventor： Kaushik Dasgupta , Chuanzhao Yu , Chintan Thakkar , Saeid Daneshgar , Hyun Yoon , Xi Li , Anandaroop Chakrabarti , Stefan Shopov
Abstract: An on-chip transformer circuit is disclosed. The on-chip transformer circuit comprises a primary winding circuit comprising at least one turn of a primary conductive winding arranged as a first N-sided polygon in a first dielectric layer of a substrate; and a secondary winding circuit comprising at least one turn of a secondary conductive winding arranged as a second N-sided polygon in a second, different, dielectric layer of the substrate. In some embodiments, the primary winding circuit and the secondary winding circuit are arranged to overlap one another at predetermined locations along the primary conductive winding and the secondary conductive winding, wherein the predetermined locations comprise a number of locations less than all locations along the primary conductive winding and the secondary conductive winding.
-
公开(公告)号：US20210313943A1
公开(公告)日：2021-10-07
申请号：US17315931
申请日：2021-05-10
Applicant: Intel Corporation
Inventor： Kaushik Dasgupta , Chuanzhao Yu , Chintan Thakkar , SAEID DANESHGAR , Hyun Yoon , Xi Li , Anandaroop Chakrabarti , Stefan Shopov
Abstract: An on-chip transformer circuit is disclosed. The on-chip transformer circuit comprises a primary winding circuit comprising at least one turn of a primary conductive winding arranged as a first N-sided polygon in a first dielectric layer of a substrate; and a secondary winding circuit comprising at least one turn of a secondary conductive winding arranged as a second N-sided polygon in a second, different, dielectric layer of the substrate. In some embodiments, the primary winding circuit and the secondary winding circuit are arranged to overlap one another at predetermined locations along the primary conductive winding and the secondary conductive winding, wherein the predetermined locations comprise a number of locations less than all locations along the primary conductive winding and the secondary conductive winding.
-
-
-
-
-
-
Search Results
7
records
(took 0.017 seconds)
