公开(公告)号：US11048542B2

公开(公告)日：2021-06-29

申请号：US16333987

申请日：2019-02-22

Applicant: INTEL CORPORATION

Inventor： Chuanxiao Dong ,  Yaozu Dong ,  Zhiyuan Lv ,  Zhi Wang

IPC: G06F9/455 ,  G06F9/48

Abstract: Implementations disclosed describe a system and a method to execute a virtual machine on a processing device, receive a request to access a memory page identified by a guest virtual memory address (GVA) in an address space of the virtual machine, translate the GVA to a guest physical memory address (GPA) using a guest page table (GPT) comprising a GPT entry mapping the GVA to the GPA, translate the GPA to a host physical address (HPA) of the memory page, store, in a translation lookaside buffer (TLB), a TLB entry mapping the GVA to the HPA, modify the GPT entry to designate the memory page as accessed, detect an attempt by an application to modify the GPT entry; generate, in response to the attempt to modify the GPT entry, a page fault; and flush, in response to the page fault, the TLB entry.

公开(公告)号：US20210294636A1

公开(公告)日：2021-09-23

申请号：US17343078

申请日：2021-06-09

Applicant: Intel Corporation

Inventor： Chuanxiao Dong ,  Yaozu Dong ,  Zhiyuan LV ,  Zhi Wang

IPC: G06F9/455 ,  G06F9/48

Abstract: Implementations disclosed describe a system and a method to execute a virtual machine on a processing device, receive a request to access a memory page identified by a guest virtual memory address (GVA) in an address space of the virtual machine, translate the GVA to a guest physical memory address (GPA) using a guest page table (GPT) comprising a GPT entry mapping the GVA to the GPA, translate the GPA to a host physical address (HPA) of the memory page, store, in a translation lookaside buffer (TLB), a TLB entry mapping the GVA to the HPA, modify the GPT entry to designate the memory page as accessed, detect an attempt by an application to modify the GPT entry; generate, in response to the attempt to modify the GPT entry, a page fault; and flush, in response to the page fault, the TLB entry.

公开(公告)号：US11886906B2

公开(公告)日：2024-01-30

申请号：US17343078

申请日：2021-06-09

Applicant: Intel Corporation

Inventor： Chuanxiao Dong ,  Yaozu Dong ,  Zhiyuan Lv ,  Zhi Wang

IPC: G06F9/455 ,  G06F9/48

CPC classification number: G06F9/45558 ,  G06F9/485 ,  G06F2009/45583 ,  G06F2009/45591

Abstract: Implementations disclosed describe a system and a method to execute a virtual machine on a processing device, receive a request to access a memory page identified by a guest virtual memory address (GVA) in an address space of the virtual machine, translate the GVA to a guest physical memory address (GPA) using a guest page table (GPT) comprising a GPT entry mapping the GVA to the GPA, translate the GPA to a host physical address (HPA) of the memory page, store, in a translation lookaside buffer (TLB), a TLB entry mapping the GVA to the HPA, modify the GPT entry to designate the memory page as accessed, detect an attempt by an application to modify the GPT entry; generate, in response to the attempt to modify the GPT entry, a page fault; and flush, in response to the page fault, the TLB entry.

公开(公告)号：US20200097313A1

公开(公告)日：2020-03-26

申请号：US16333987

申请日：2019-02-22

Applicant: INTEL CORPORATION

Inventor： Chuanxiao Dong ,  Yaozu Dong ,  Zhiyuan Lv ,  Zhi Wang

IPC: G06F9/455 ,  G06F9/48

Abstract: Implementations disclosed describe a system and a method to execute a virtual machine on a processing device, receive a request to access a memory page identified by a guest virtual memory address (GVA) in an address space of the virtual machine, translate the GVA to a guest physical memory address (GPA) using a guest page table (GPT) comprising a GPT entry mapping the GVA to the GPA, translate the GPA to a host physical address (HPA) of the memory page, store, in a translation lookaside buffer (TLB), a TLB entry mapping the GVA to the HPA, modify the GPT entry to designate the memory page as accessed, detect an attempt by an application to modify the GPT entry; generate, in response to the attempt to modify the GPT entry, a page fault; and flush, in response to the page fault, the TLB entry.