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    SCALING HALF-PRECISION FLOATING POINT TENSORS FOR TRAINING DEEP NEURAL NETWORKS
    1.
    发明申请
    SCALING HALF-PRECISION FLOATING POINT TENSORS FOR TRAINING DEEP NEURAL NETWORKS 审中-公开

    公开(公告)号：US20190354846A1

    公开(公告)日：2019-11-21

    申请号：US16526376

    申请日：2019-07-30

    Applicant: Intel Corporation

    Inventor： NAVEEN MELLEMPUDI ,  DIPANKAR DAS

    IPC: G06N3/063 ,  G06T1/20 ,  G06F7/544 ,  G06F7/487 ,  G06N3/04 ,  G06N3/08 ,  G06F5/01

    Abstract: A graphics processor is described that includes a single instruction, multiple thread (SIMT) architecture including hardware multithreading. The multiprocessor can execute parallel threads of instructions associated with a command stream, where the multiprocessor includes a set of functional units to execute at least one of the parallel threads of the instructions. The set of functional units can include a mixed precision tensor processor to perform tensor computations to generate loss data. The loss data is stored as a floating-point data type and scaled by a scaling factor to enable a data distribution of a gradient tensor generated based on the loss data to be represented by a 16-bit floating point data type.

    SCALING HALF-PRECISION FLOATING POINT TENSORS FOR TRAINING DEEP NEURAL NETWORKS
    4.
    发明申请
    SCALING HALF-PRECISION FLOATING POINT TENSORS FOR TRAINING DEEP NEURAL NETWORKS 有权

    公开(公告)号：US20220269931A1

    公开(公告)日：2022-08-25

    申请号：US17742138

    申请日：2022-05-11

    Applicant: Intel Corporation

    Inventor： NAVEEN MELLEMPUDI ,  DIPANKAR DAS

    IPC: G06N3/063 ,  G06F7/487 ,  G06F7/544 ,  G06T1/20 ,  G06N3/04 ,  G06F5/01 ,  G06N3/08

    Abstract: A graphics processor is described that includes a single instruction, multiple thread (SIMT) architecture including hardware multithreading. The multiprocessor can execute parallel threads of instructions associated with a command stream, where the multiprocessor includes a set of functional units to execute at least one of the parallel threads of the instructions. The set of functional units can include a mixed precision tensor processor to perform tensor computations. The functional units can also include circuitry to analyze statistics for output values of the tensor computations, determine a target format to convert the output values, the target format determined based on the statistics for the output values and a precision associated with a second layer of the neural network, and convert the output values to the target format.

    SCALING HALF-PRECISION FLOATING POINT TENSORS FOR TRAINING DEEP NEURAL NETWORKS
    5.
    发明申请
    SCALING HALF-PRECISION FLOATING POINT TENSORS FOR TRAINING DEEP NEURAL NETWORKS 审中-公开

    公开(公告)号：US20180322382A1

    公开(公告)日：2018-11-08

    申请号：US15869582

    申请日：2018-01-12

    Applicant: Intel Corporation

    Inventor： NAVEEN MELLEMPUDI ,  DIPANKAR DAS

    IPC: G06N3/063 ,  G06T1/20 ,  G06F7/544 ,  G06F7/487

    CPC classification number: G06N3/063 ,  G06F7/487 ,  G06F7/5443 ,  G06T1/20

    Abstract: One embodiment provides for a machine-learning accelerator device a multiprocessor to execute parallel threads of an instruction stream, the multiprocessor including a compute unit, the compute unit including a set of functional units, each functional unit to execute at least one of the parallel threads of the instruction stream. The compute unit includes compute logic configured to execute a single instruction to scale an input tensor associated with a layer of a neural network according to a scale factor, the input tensor stored in a floating-point data type, the compute logic to scale the input tensor to enable a data distribution of data of the input tensor to be represented by a 16-bit floating point data type.

    ABSTRACTION LAYERS FOR SCALABLE DISTRIBUTED MACHINE LEARNING
    6.
    发明申请
    ABSTRACTION LAYERS FOR SCALABLE DISTRIBUTED MACHINE LEARNING 审中-公开

    公开(公告)号：US20180293493A1

    公开(公告)日：2018-10-11

    申请号：US15482953

    申请日：2017-04-10

    Applicant: Intel Corporation

    Inventor： Dhiraj D. Kalamkar ,  KARTHIKEYAN VAIDYANATHAN ,  SRINIVAS SRIDHARAN ,  DIPANKAR DAS

    IPC: G06N3/08 ,  G06T1/60 ,  G06T1/20

    Abstract: One embodiment provides for a method of transmitting data between multiple compute nodes of a distributed compute system, the method comprising creating a global view of communication operations to be performed between the multiple compute nodes of the distributed compute system, the global view created using information specific to a machine learning model associated with the distributed compute system; using the global view to determine a communication cost of the communication operations; and automatically determining a number of network endpoints for use in transmitting the data between the multiple compute nodes of the distributed compute system.

    SCALING HALF-PRECISION FLOATING POINT TENSORS FOR TRAINING DEEP NEURAL NETWORKS
    8.
    发明申请
    SCALING HALF-PRECISION FLOATING POINT TENSORS FOR TRAINING DEEP NEURAL NETWORKS 有权

    公开(公告)号：US20250061318A1

    公开(公告)日：2025-02-20

    申请号：US18818154

    申请日：2024-08-28

    Applicant: Intel Corporation

    Inventor： NAVEEN MELLEMPUDI ,  DIPANKAR DAS

    IPC: G06N3/063 ,  G06F5/01 ,  G06F7/487 ,  G06F7/544 ,  G06N3/044 ,  G06N3/045 ,  G06N3/084 ,  G06T1/20

    Abstract: One embodiment provides for a machine-learning accelerator device a multiprocessor to execute parallel threads of an instruction stream, the multiprocessor including a compute unit, the compute unit including a set of functional units, each functional unit to execute at least one of the parallel threads of the instruction stream. The compute unit includes compute logic configured to execute a single instruction to scale an input tensor associated with a layer of a neural network according to a scale factor, the input tensor stored in a floating-point data type, the compute logic to scale the input tensor to enable a data distribution of data of the input tensor to be represented by a 16-bit floating point data type.

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