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公开(公告)号:US12166031B2
公开(公告)日:2024-12-10
申请号:US17131616
申请日:2020-12-22
Applicant: Intel Corporation
Inventor: Biswajeet Guha , Brian Greene , Daniel Schulman , William Hsu , Chung-Hsun Lin , Curtis Tsai , Kevin Fischer
Abstract: Substrate-less electrostatic discharge (ESD) integrated circuit structures, and methods of fabricating substrate-less electrostatic discharge (ESD) integrated circuit structures, are described. For example, a substrate-less integrated circuit structure includes a first fin and a second fin protruding from a semiconductor pedestal. An N-type region is in the first and second fins. A P-type region is in the semiconductor pedestal. A P/N junction is between the N-type region and the P-type region, the P/N junction on or in the semiconductor pedestal.