公开(公告)号：US11315843B2

公开(公告)日：2022-04-26

申请号：US16472837

申请日：2016-12-28

Applicant: Intel Corporation

Inventor： Yi Elyn Xu ,  Bilal Khalaf ,  Dennis Sean Carr

IPC: H01L23/48 ,  H01L23/13 ,  H01L21/48 ,  H01L23/498 ,  H01L25/16

Abstract: Various embodiments disclosed relate to a substrate for a semiconductor device. The substrate includes a first major surface and a second major surface opposite the first major surface. The substrate further includes a cavity defined by a portion of the first major surface. The cavity includes a bottom dielectric surface and a plurality of sidewalls extending from the bottom surface to the first major surface. A first portion of a first sidewall includes a conductive material.

公开(公告)号：US20220223487A1

公开(公告)日：2022-07-14

申请号：US17707094

申请日：2022-03-29

Applicant: Intel Corporation

Inventor： Yi Elyn Xu ,  Bilal Khalaf ,  Dennis Sean Carr

IPC: H01L23/13 ,  H01L21/48 ,  H01L23/498 ,  H01L25/16

Abstract: Various embodiments disclosed relate to a substrate for a semiconductor device. The substrate includes a first major surface and a second major surface opposite the first major surface. The substrate further includes a cavity defined by a portion of the first major surface. The cavity includes a bottom dielectric surface and a plurality of sidewalls extending from the bottom surface to the first major surface. A first portion of a first sidewall includes a conductive material.

公开(公告)号：US11710674B2

公开(公告)日：2023-07-25

申请号：US17707094

申请日：2022-03-29

Applicant: Intel Corporation

Inventor： Yi Elyn Xu ,  Bilal Khalaf ,  Dennis Sean Carr

IPC: H01L23/48 ,  H01L23/13 ,  H01L21/48 ,  H01L23/498 ,  H01L25/16

CPC classification number: H01L23/13 ,  H01L21/4846 ,  H01L23/49838 ,  H01L25/16

Abstract: Various embodiments disclosed relate to a substrate for a semiconductor device. The substrate includes a first major surface and a second major surface opposite the first major surface. The substrate further includes a cavity defined by a portion of the first major surface. The cavity includes a bottom dielectric surface and a plurality of sidewalls extending from the bottom surface to the first major surface. A first portion of a first sidewall includes a conductive material.