公开(公告)号：US09294403B2

公开(公告)日：2016-03-22

申请号：US14125707

申请日：2013-06-28

Applicant: Intel Corporation

Inventor： Andres Mejia ,  Donglai Dai ,  Gaspar Mora Porta

IPC: H04L12/801 ,  H04L12/935 ,  H04L12/707 ,  H04L12/729 ,  H04L12/751

CPC classification number: H04L47/12 ,  H04L45/10 ,  H04L45/125 ,  H04L45/18 ,  H04L45/22 ,  H04L47/11 ,  H04L49/251 ,  H04L49/30 ,  H04L49/3018

Abstract: Methods and apparatus relating to techniques for controlling resource utilization with adaptive routing are described. In one embodiment, an output port for transmission of an incoming message that is to be received at an input port is determined at routing logic. The routing logic selects the output port from a first output port and a second output port based on congestion information that is detected at one or more other routing logic communicatively coupled to the routing logic. The first output port provides a deterministic route for the incoming message and the second output port provides an adaptive route for the incoming message. Other embodiments are also disclosed.

Abstract translation: 描述了与利用自适应路由控制资源利用的技术有关的方法和装置。 在一个实施例中，用于传输要在输入端口接收的输入消息的输出端口在路由逻辑处被确定。 基于通信地耦合到路由逻辑的一个或多个其他路由逻辑检测到的拥塞信息，路由逻辑从第一输出端口和第二输出端口选择输出端口。 第一个输出端口为传入消息提供确定性路由，第二个输出端口为传入消息提供一个自适应路由。 还公开了其他实施例。

公开(公告)号：US20160164689A1

公开(公告)日：2016-06-09

申请号：US15012181

申请日：2016-02-01

Applicant: Intel Corporation

Inventor： Dongkook Park ,  Akhilesh Kumar ,  Donglai Dai

IPC: H04L12/12 ,  G06F1/32

CPC classification number: H04L12/12 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3234 ,  G06F1/3246 ,  G06F1/3253 ,  H03K19/0008 ,  H03K19/0016 ,  Y02B70/12 ,  Y02B70/30 ,  Y02D10/151

Abstract: Techniques for power gating. A first on-die router has an output port to receive data from a switching fabric. The output port is placed in a power-gated state if there is no activity in the output port for a current cycle and no messages are to be received by the output port during a subsequent cycle. A second on-die router has an input port coupled with the output port of the first on-die router. The input port is placed in a power-gated state if an input port buffer is empty and the output port is not active. Power-gating of the input port and the output port are independent of each other.

Abstract translation: 电力门控技术 第一个片上路由器具有从交换结构接收数据的输出端口。 如果在当前周期的输出端口中没有活动，并且在后续周期期间输出端口不接收消息，则输出端口处于电源门控状态。 第二个管芯路由器具有与第一管芯路由器的输出端口耦合的输入端口。 如果输入端口缓冲区为空并且输出端口未激活，则输入端口处于电源门控状态。 输入端口和输出端口的电源门控彼此独立。

公开(公告)号：US08867559B2

公开(公告)日：2014-10-21

申请号：US13629351

申请日：2012-09-27

Applicant: Intel Corporation

Inventor： Donglai Dai ,  Andres Mejia ,  Gaspar Mora Porta

IPC: H04L12/28

CPC classification number: H04L47/6275 ,  H04L47/6215

Abstract: An apparatus that includes input ports, input buffers coupled with respective input ports, output ports, and routing control circuitry coupled with the input ports, the input buffers and/or the output ports. The plurality of input buffers and the plurality of output ports, the routing control circuitry to maintain a two-tier priority scheme having at least two queues for prioritizing requests stored in the plurality of input buffers.

Abstract translation: 一种装置，包括输入端口，与相应输入端口耦合的输入缓冲器，输出端口以及与输入端口，输入缓冲器和/或输出端口耦合的路由控制电路。 多个输入缓冲器和多个输出端口，路由控制电路用于维护具有至少两个队列的两层优先级方案，用于对存储在多个输入缓冲器中的请求进行优先级排序。

公开(公告)号：US09887849B2

公开(公告)日：2018-02-06

申请号：US15012181

申请日：2016-02-01

Applicant: Intel Corporation

Inventor： Dongkook Park ,  Akhilesh Kumar ,  Donglai Dai

IPC: H04L12/28 ,  H04L12/12 ,  G06F1/32 ,  H03K19/00 ,  H04J1/16

CPC classification number: H04L12/12 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3234 ,  G06F1/3246 ,  G06F1/3253 ,  H03K19/0008 ,  H03K19/0016 ,  Y02B70/12 ,  Y02B70/30 ,  Y02D10/151

Abstract: Techniques for power gating. A first on-die router has an output port to receive data from a switching fabric. The output port is placed in a power-gated state if there is no activity in the output port for a current cycle and no messages are to be received by the output port during a subsequent cycle. A second on-die router has an input port coupled with the output port of the first on-die router. The input port is placed in a power-gated state if an input port buffer is empty and the output port is not active. Power-gating of the input port and the output port are independent of each other.

公开(公告)号：US09250679B2

公开(公告)日：2016-02-02

申请号：US13791574

申请日：2013-03-08

Applicant: Intel Corporation

Inventor： Dongkook Park ,  Akhilesh Kumar ,  Donglai Dai

IPC: H04L12/28 ,  G06F1/32 ,  H03K19/00 ,  H04J1/16

CPC classification number: H04L12/12 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3234 ,  G06F1/3246 ,  G06F1/3253 ,  H03K19/0008 ,  H03K19/0016 ,  Y02B70/12 ,  Y02B70/30 ,  Y02D10/151

Abstract: Techniques for power gating. A first on-die router has an output port to receive data from a switching fabric. The output port is placed in a power-gated state if there is no activity in the output port for a current cycle and no messages are to be received by the output port during a subsequent cycle. A second on-die router has an input port coupled with the output port of the first on-die router. The input port is placed in a power-gated state if an input port buffer is empty and the output port is not active. Power-gating of the input port and the output port are independent of each other.

Abstract translation: 电力门控技术 第一个片上路由器具有从交换结构接收数据的输出端口。 如果在当前周期的输出端口中没有活动，并且在后续周期期间输出端口不接收消息，则输出端口处于电源门控状态。 第二个管芯路由器具有与第一管芯路由器的输出端口耦合的输入端口。 如果输入端口缓冲区为空并且输出端口未激活，则输入端口处于电源门控状态。 输入端口和输出端口的电源门控彼此独立。