公开(公告)号：US20180011748A1

公开(公告)日：2018-01-11

申请号：US15699823

申请日：2017-09-08

Applicant: Intel Corporation

Inventor： Haitham Akkary ,  Ravi Rajwar ,  Srikanth T. Srinivasan

IPC: G06F9/52 ,  G06F9/38 ,  G06F9/30

CPC classification number: G06F9/52 ,  G06F9/3004 ,  G06F9/30087 ,  G06F9/3834 ,  G06F9/3859

Abstract: A method and apparatus for post-retire transaction access tracking is herein described. Load and store buffers are capable of storing senior entries. In the load buffer a first access is scheduled based on a load buffer entry. Tracking information associated with the load is stored in a filter field in the load buffer entry. Upon retirement, the load buffer entry is marked as a senior load entry. A scheduler schedules a post-retire access to update transaction tracking information, if the filter field does not represent that the tracking information has already been updated during a pendency of the transaction. Before evicting a line in a cache, the load buffer is snooped to ensure no load accessed the line to be evicted.