公开(公告)号：US20180063534A1

公开(公告)日：2018-03-01

申请号：US15403935

申请日：2017-01-11

Applicant: Intel Corporation

Inventor： Iole MOCCAGATTA ,  Zhipin DENG ,  Hiu-Fai CHAN ,  Lidong XU

IPC: H04N19/176 ,  H04N19/159 ,  H04N19/70 ,  H04N19/172

CPC classification number: H04N19/176 ,  H04N19/103 ,  H04N19/159 ,  H04N19/172 ,  H04N19/463 ,  H04N19/70 ,  H04N19/91

Abstract: Techniques related to video coding with context decoding and reconstruction bypass.

公开(公告)号：US20180131936A1

公开(公告)日：2018-05-10

申请号：US15348783

申请日：2016-11-10

Applicant: Intel Corporation

Inventor： Wen TANG ,  Iole MOCCAGATTA

IPC: H04N19/124 ,  H04N19/15 ,  H04N19/13 ,  H04N19/159 ,  H04N19/88

CPC classification number: H04N19/124 ,  H04N19/129 ,  H04N19/13 ,  H04N19/15 ,  H04N19/159 ,  H04N19/172 ,  H04N19/176 ,  H04N19/186 ,  H04N19/88

Abstract: A video coder conversion buffer to decouple a normative coding order and a processing order for blocks of video coefficients for intra coding processing such video coefficients as well as interleaving schemes for the processing order are discussed.