公开(公告)号：US20240098938A1

公开(公告)日：2024-03-21

申请号：US18526948

申请日：2023-12-01

Applicant: Intel Corporation

Inventor： Ravishankar Srikanth ,  Vijith Halestoph R ,  Prakash Kurma Raju ,  Arnab Sen ,  Isha Garg ,  Ezekiel Poulose ,  Avinash Manu Aravindan

IPC: H05K7/20

CPC classification number: H05K7/20336 ,  H05K7/20154 ,  H05K7/2039

Abstract: Techniques for a vapor chamber with less dead space are disclosed. In an illustrative embodiment, a vapor chamber is formed by folding a sheet and sealing the edges. The edges seal the vapor chamber but take up a relatively large amount of space without allowing for vapor to be transported in that space. The folded edge takes up less space, reducing the overall footprint of the vapor chamber. The vapor chamber with a smaller footprint can allow for, e.g., more space for motherboard area, more space for a battery, and/or a smaller form factor overall.