公开(公告)号：US12265830B2

公开(公告)日：2025-04-01

申请号：US17924036

申请日：2020-06-26

Applicant: Intel Corporation

Inventor： Min Wu ,  Jun Zhang ,  Yuyang Xia ,  Dan Liu ,  Chao Zhou ,  Lianchang Du ,  Carrie Chen ,  Nishi Ahuja ,  Jason Crop ,  Wenqing Lv

IPC: G06F1/26 ,  G06F1/20 ,  G06F9/44 ,  G01K7/00

Abstract: Disclosed embodiments are related to techniques for powering compute platforms in low temperature environments. Embodiments include a preheating stage that is added to a power up sequence. The preheating stage may include a force-on stage and a force-offstage. During the force-on stage, all power rails of target components are forced to an ON state so that the target components consume current. When a target operating temperature is reached, the power rails of the target components are turned off, which causes the target components to revert back to their initial (pre-boot) state allowing the normal boot process to take place. Since the target components are now heated up, the boot process can execute faster than when the target components were cold. Other embodiments may be described and/or claimed.

公开(公告)号：US10782729B2

公开(公告)日：2020-09-22

申请号：US15827604

申请日：2017-11-30

Applicant: Intel Corporation

Inventor： Bahaa Fahim ,  Vedaraman Geetha ,  Don C. Soltis, Jr. ,  Samuel Strom ,  Jason Crop

IPC: G06F1/14 ,  G06F1/08 ,  G06F1/10 ,  G06F1/324 ,  G06F1/3234 ,  G06F9/22

Abstract: In an embodiment, a processor for clock signal modulation includes a clock source to generate a global clock signal, at least one processor component, a counter, and a circuit. The circuit is to: adjust the counter based on a level of activity of the at least one processor component; modulate, based on a value of the counter, the global clock signal to generate a modulated clock signal; and provide the modulated clock signal to the at least one processor component. Other embodiments are described and claimed.