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公开(公告)号:US11238308B2
公开(公告)日:2022-02-01
申请号:US16018136
申请日:2018-06-26
Applicant: Intel Corporation
Inventor: Jorge A. Munoz
IPC: G06K9/62 , G06N7/08 , G06N20/00 , G06F16/901 , G06N5/02
Abstract: An embodiment of a semiconductor package apparatus may include technology to map a collection of data into two or more mathematical graph representations of the data based on a configurable set of rules that one of preserves or enhances relationships or properties of the data, and organize the two or more graph representations into two or more clusters of data based on graph information entropy and one or more parameters. Other embodiments are disclosed and claimed.
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公开(公告)号:US10956476B2
公开(公告)日:2021-03-23
申请号:US16083108
申请日:2016-04-01
Applicant: Intel Corporation
Inventor: Jorge A. Munoz , James Asoka Diggs , John David Miller , Vikas Sharma
IPC: G06F16/00 , G06F16/35 , G06F16/93 , G06F15/16 , G06N5/02 , G06N20/00 , G06F21/55 , G06F17/11 , G06K9/00 , G06K9/62 , G06Q10/10
Abstract: There is disclosed in an example a computing apparatus for assigning an entropy score to a document to be added to a corpus in a first temporal state having a first corpus entropy, having one or more logic elements, including at least one hardware logic element, providing a classification engine to: receive the document to be added to the corpus; add the document to the corpus, creating a second temporal state of the corpus; compute a second corpus entropy for the second temporal state, based at least in part on a morphism; and assign the document a gentropy score based at least in part on a difference between the first corpus entropy and the second corpus entropy.
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公开(公告)号:US20190080000A1
公开(公告)日:2019-03-14
申请号:US16083108
申请日:2016-04-01
Applicant: Intel Corporation
Inventor: Jorge A. Munoz , James Asoka Diggs , John David Miller , Vikas Sharma
Abstract: There is disclosed in an example a computing apparatus for assigning an entropy score to a document to be added to a corpus in a first temporal state having a first corpus entropy, having one or more logic elements, including at least one hardware logic element, providing a classification engine to: receive the document to be added to the corpus; add the document to the corpus, creating a second temporal state of the corpus; compute a second corpus entropy for the second temporal state, based at least in part on a morphism; and assign the document a gentropy score based at least in part on a difference between the first corpus entropy and the second corpus entropy.
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公开(公告)号:US20190042879A1
公开(公告)日:2019-02-07
申请号:US16018136
申请日:2018-06-26
Applicant: Intel Corporation
Inventor: Jorge A. Munoz
Abstract: An embodiment of a semiconductor package apparatus may include technology to map a collection of data into two or more mathematical graph representations of the data based on a configurable set of rules that one of preserves or enhances relationships or properties of the data, and organize the two or more graph representations into two or more clusters of data based on graph information entropy and one or more parameters. Other embodiments are disclosed and claimed.
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公开(公告)号:US09926193B2
公开(公告)日:2018-03-27
申请号:US15301337
申请日:2014-06-27
Applicant: Intel Corporation
Inventor: Jorge A. Munoz , Dmitri E. Nikonov , Kelin J. Kuhn , Patrick Theofanis , Chytra Pawashe , Kevin Lin , Seiyon Kim
IPC: B82B1/00 , B82B3/00 , H01L29/66 , H01L29/84 , H01L29/82 , H01H59/00 , B82Y15/00 , B82Y25/00 , B82Y40/00
CPC classification number: B82B1/005 , B81B3/0016 , B81B7/02 , B81B2201/014 , B81B2203/0118 , B82B1/002 , B82B3/0023 , B82Y15/00 , B82Y25/00 , B82Y40/00 , H01H1/0094 , H01H1/54 , H01H59/0009 , H01L29/66227 , H01L29/82 , H01L29/84 , Y10S977/732 , Y10S977/838 , Y10S977/888 , Y10S977/938
Abstract: Nanoelectromechanical (NEMS) devices having nanomagnets for an improved range of operating voltages and improved control of dimensions of a cantilever are described. For example, in an embodiment, a nanoelectromechanical (NEMS) device includes a substrate layer, a first magnetic layer disposed above the substrate layer, a first dielectric layer disposed above the first magnetic layer, a second dielectric disposed above the first dielectric layer, and a cantilever disposed above the second dielectric layer. The cantilever bends from a first position to a second position towards the substrate layer when a voltage is applied to the cantilever.
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