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公开(公告)号:US11029927B2
公开(公告)日:2021-06-08
申请号:US16370935
申请日:2019-03-30
Applicant: Intel Corporation
Inventor: Kermin E. ChoFleming, Jr. , Jesmin Jahan Tithi , Joshua Cranmer , Suresh Srinivasan
Abstract: Disclosed examples to detect and annotate backedges in data-flow graphs include: a characteristic detector to store a node characteristic identifier in memory in association with a first node of a dataflow graph; a characteristic comparator to compare the node characteristic identifier with a reference criterion; and a backedge identifier generator to generate a backedge identifier indicative of a backedge between the first node and a second node of the dataflow graph based on the comparison, the memory to store the backedge identifier in association with a connection arc between the first and second nodes.
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公开(公告)号:US11106438B2
公开(公告)日:2021-08-31
申请号:US16832797
申请日:2020-03-27
Applicant: Intel Corporation
Inventor: Dounia Khaldi , Rakesh Krishnaiyer , Rajiv Deodhar , Daniel Woodworth , Joshua Cranmer , Kent Glossop
Abstract: Various embodiments are generally directed to optimizing dataflow in automated transformation frameworks (e.g., compiler, runtime, etc.) for spatial architectures (e.g., Configurable Spatial Accelerator) that translate high-level user code into forms that use “streams” (e.g., Latency Insensitive Channels, line buffers) to reduce overhead, eliminate or improve the efficiency of redundant memory accesses, and improve overall throughput.
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公开(公告)号:US12032934B2
公开(公告)日:2024-07-09
申请号:US17483459
申请日:2021-09-23
Applicant: Intel Corporation
Inventor: Charles Yount , Rakesh Krishnaiyer , Timothy Creech , Daniel Woodworth , Joshua Cranmer
IPC: G06F8/41
CPC classification number: G06F8/4434
Abstract: Methods, apparatus, systems and articles of manufacture (e.g., computer readable storage media) to perform automatic compiler optimization to enable streaming-store generation for unaligned contiguous write access are disclosed. Example apparatus disclosed herein are to mark a store instruction in source program code as a transformation candidate when the store instruction is associated with a group of memory accesses that are unaligned with respect to a size of a cache line in a cache. Disclosed apparatus are also to transform the store instruction that is marked as the transformation candidate to form transformed program code when a non-temporal property is satisfied, the transformed program code to replace the store instruction with (i) a write to a buffer in the cache and (ii) a streaming-store instruction that is to write contents of the buffer to memory.
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公开(公告)号:US11693633B2
公开(公告)日:2023-07-04
申请号:US17341086
申请日:2021-06-07
Applicant: Intel Corporation
Inventor: Kermin E. ChoFleming, Jr. , Jesmin Jahan Tithi , Joshua Cranmer , Suresh Srinivasan
CPC classification number: G06F8/34 , G06F8/433 , G06F8/443 , G06F9/4494 , G06F15/82
Abstract: Disclosed examples to detect and annotate backedges in data-flow graphs include: a characteristic detector to store a node characteristic identifier in memory in association with a first node of a dataflow graph; a characteristic comparator to compare the node characteristic identifier with a reference criterion; and a backedge identifier generator to generate a backedge identifier indicative of a backedge between the first node and a second node of the dataflow graph based on the comparison, the memory to store the backedge identifier in association with a connection arc between the first and second nodes.
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公开(公告)号:US20210365248A1
公开(公告)日:2021-11-25
申请号:US17341086
申请日:2021-06-07
Applicant: Intel Corporation
Inventor: Kermin E. ChoFleming, JR. , Jesmin Jahan Tithi , Joshua Cranmer , Suresh Srinivasan
Abstract: Disclosed examples to detect and annotate backedges in data-flow graphs include: a characteristic detector to store a node characteristic identifier in memory in association with a first node of a dataflow graph; a characteristic comparator to compare the node characteristic identifier with a reference criterion; and a backedge identifier generator to generate a backedge identifier indicative of a backedge between the first node and a second node of the dataflow graph based on the comparison, the memory to store the backedge identifier in association with a connection arc between the first and second nodes.
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公开(公告)号:US20220012028A1
公开(公告)日:2022-01-13
申请号:US17483459
申请日:2021-09-23
Applicant: Intel Corporation
Inventor: Charles Yount , Rakesh Krishnaiyer , Timothy Creech , Daniel Woodworth , Joshua Cranmer
IPC: G06F8/41
Abstract: Methods, apparatus, systems and articles of manufacture (e.g., computer readable storage media) to perform automatic compiler optimization to enable streaming-store generation for unaligned contiguous write access are disclosed. Example apparatus disclosed herein are to mark a store instruction in source program code as a transformation candidate when the store instruction is associated with a group of memory accesses that are unaligned with respect to a size of a cache line in a cache. Disclosed apparatus are also to transform the store instruction that is marked as the transformation candidate to form transformed program code when a non-temporal property is satisfied, the transformed program code to replace the store instruction with (i) a write to a buffer in the cache and (ii) a streaming-store instruction that is to write contents of the buffer to memory.
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公开(公告)号:US20190227777A1
公开(公告)日:2019-07-25
申请号:US16370935
申请日:2019-03-30
Applicant: Intel Corporation
Inventor: Kermin E. ChoFleming, JR. , Jesmin Jahan Tithi , Joshua Cranmer , Suresh Srinivasan
Abstract: Disclosed examples to detect and annotate backedges in data-flow graphs include: a characteristic detector to store a node characteristic identifier in memory in association with a first node of a dataflow graph; a characteristic comparator to compare the node characteristic identifier with a reference criterion; and a backedge identifier generator to generate a backedge identifier indicative of a backedge between the first node and a second node of the dataflow graph based on the comparison, the memory to store the backedge identifier in association with a connection arc between the first and second nodes.
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